blob: 8f78937e097300e727b6d0d2ccf4232d95e6395a [file] [log] [blame]
Fabio Estevamebc8fcc2019-12-09 10:43:03 -03001// SPDX-License-Identifier: GPL-2.0+
2/*
3 * Copyright (C) 2016 Freescale Semiconductor, Inc.
4 */
5
Simon Glass97589732020-05-10 11:40:02 -06006#include <init.h>
Simon Glass3ba929a2020-10-30 21:38:53 -06007#include <asm/global_data.h>
Fabio Estevamebc8fcc2019-12-09 10:43:03 -03008#include <asm/io.h>
9#include <asm/arch/sys_proto.h>
10#include <asm/arch/mx7ulp-pins.h>
11#include <asm/arch/iomux.h>
12#include <asm/gpio.h>
13
14DECLARE_GLOBAL_DATA_PTR;
15
16#define UART_PAD_CTRL (PAD_CTL_PUS_UP)
17
18int dram_init(void)
19{
20 gd->ram_size = imx_ddr_size();
21
Ricardo Salveti5f371cc2021-08-25 18:47:18 +030022#ifdef CONFIG_OPTEE_TZDRAM_SIZE
23 gd->ram_size -= CONFIG_OPTEE_TZDRAM_SIZE;
24#endif
25
Fabio Estevamebc8fcc2019-12-09 10:43:03 -030026 return 0;
27}
28
29static iomux_cfg_t const lpuart4_pads[] = {
30 MX7ULP_PAD_PTC3__LPUART4_RX | MUX_PAD_CTRL(UART_PAD_CTRL),
31 MX7ULP_PAD_PTC2__LPUART4_TX | MUX_PAD_CTRL(UART_PAD_CTRL),
32};
33
34static void setup_iomux_uart(void)
35{
36 mx7ulp_iomux_setup_multiple_pads(lpuart4_pads,
37 ARRAY_SIZE(lpuart4_pads));
38}
39
40int board_early_init_f(void)
41{
42 setup_iomux_uart();
43
44 return 0;
45}
46
47int board_init(void)
48{
49 /* address of boot parameters */
50 gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
51
52 return 0;
53}
Ricardo Salveti02192502021-09-12 17:32:57 +030054
55#ifdef CONFIG_SPL_BUILD
56#include <spl.h>
57
58#ifdef CONFIG_SPL_LOAD_FIT
59int board_fit_config_name_match(const char *name)
60{
61 if (!strcmp(name, "imx7ulp-com"))
62 return 0;
63
64 return -1;
65}
66#endif
67
68void spl_board_init(void)
69{
70 preloader_console_init();
71}
72
73void board_init_f(ulong dummy)
74{
75 arch_cpu_init();
76
77 board_early_init_f();
78}
79#endif