Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 1 | // SPDX-License-Identifier: (GPL-2.0+ OR MIT) |
| 2 | /* |
| 3 | * Device Tree file for NXP LS1028A QDS Board. |
| 4 | * |
| 5 | * Copyright 2018 NXP |
| 6 | * |
| 7 | * Harninder Rai <harninder.rai@nxp.com> |
| 8 | * |
| 9 | */ |
| 10 | |
| 11 | /dts-v1/; |
| 12 | |
| 13 | #include "fsl-ls1028a.dtsi" |
| 14 | |
| 15 | / { |
| 16 | model = "LS1028A QDS Board"; |
| 17 | compatible = "fsl,ls1028a-qds", "fsl,ls1028a"; |
| 18 | |
| 19 | aliases { |
| 20 | crypto = &crypto; |
| 21 | gpio0 = &gpio1; |
| 22 | gpio1 = &gpio2; |
| 23 | gpio2 = &gpio3; |
| 24 | serial0 = &duart0; |
| 25 | serial1 = &duart1; |
| 26 | mmc0 = &esdhc; |
| 27 | mmc1 = &esdhc1; |
| 28 | rtc1 = &ftm_alarm1; |
| 29 | }; |
| 30 | |
| 31 | chosen { |
| 32 | stdout-path = "serial0:115200n8"; |
| 33 | }; |
| 34 | |
| 35 | memory@80000000 { |
| 36 | device_type = "memory"; |
| 37 | reg = <0x0 0x80000000 0x1 0x00000000>; |
| 38 | }; |
| 39 | |
| 40 | sys_mclk: clock-mclk { |
| 41 | compatible = "fixed-clock"; |
| 42 | #clock-cells = <0>; |
| 43 | clock-frequency = <25000000>; |
| 44 | }; |
| 45 | |
| 46 | reg_1p8v: regulator-1p8v { |
| 47 | compatible = "regulator-fixed"; |
| 48 | regulator-name = "1P8V"; |
| 49 | regulator-min-microvolt = <1800000>; |
| 50 | regulator-max-microvolt = <1800000>; |
| 51 | regulator-always-on; |
| 52 | }; |
| 53 | |
| 54 | sb_3v3: regulator-sb3v3 { |
| 55 | compatible = "regulator-fixed"; |
| 56 | regulator-name = "3v3_vbus"; |
| 57 | regulator-min-microvolt = <3300000>; |
| 58 | regulator-max-microvolt = <3300000>; |
| 59 | regulator-boot-on; |
| 60 | regulator-always-on; |
| 61 | }; |
| 62 | |
| 63 | sound { |
| 64 | compatible = "simple-audio-card"; |
| 65 | simple-audio-card,format = "i2s"; |
| 66 | simple-audio-card,widgets = |
| 67 | "Microphone", "Microphone Jack", |
| 68 | "Headphone", "Headphone Jack", |
| 69 | "Speaker", "Speaker Ext", |
| 70 | "Line", "Line In Jack"; |
| 71 | simple-audio-card,routing = |
| 72 | "MIC_IN", "Microphone Jack", |
| 73 | "Microphone Jack", "Mic Bias", |
| 74 | "LINE_IN", "Line In Jack", |
| 75 | "Headphone Jack", "HP_OUT", |
| 76 | "Speaker Ext", "LINE_OUT"; |
| 77 | |
| 78 | simple-audio-card,cpu { |
| 79 | sound-dai = <&sai1>; |
| 80 | frame-master; |
| 81 | bitclock-master; |
| 82 | }; |
| 83 | |
| 84 | simple-audio-card,codec { |
| 85 | sound-dai = <&sgtl5000>; |
| 86 | frame-master; |
| 87 | bitclock-master; |
| 88 | system-clock-frequency = <25000000>; |
| 89 | }; |
| 90 | }; |
| 91 | |
| 92 | mdio-mux { |
| 93 | compatible = "mdio-mux-multiplexer"; |
| 94 | mux-controls = <&mux 0>; |
| 95 | mdio-parent-bus = <&enetc_mdio_pf3>; |
| 96 | #address-cells = <1>; |
| 97 | #size-cells = <0>; |
| 98 | |
| 99 | /* on-board RGMII PHY */ |
| 100 | mdio@0 { |
| 101 | #address-cells = <1>; |
| 102 | #size-cells = <0>; |
| 103 | reg = <0>; |
| 104 | |
| 105 | qds_phy1: ethernet-phy@5 { |
| 106 | /* Atheros 8035 */ |
| 107 | reg = <5>; |
| 108 | }; |
| 109 | }; |
| 110 | |
| 111 | mdio_slot1: mdio@4 { |
| 112 | #address-cells = <1>; |
| 113 | #size-cells = <0>; |
| 114 | reg = <4>; |
| 115 | }; |
| 116 | |
| 117 | mdio_slot2: mdio@5 { |
| 118 | #address-cells = <1>; |
| 119 | #size-cells = <0>; |
| 120 | reg = <5>; |
| 121 | }; |
| 122 | |
| 123 | mdio_slot3: mdio@6 { |
| 124 | #address-cells = <1>; |
| 125 | #size-cells = <0>; |
| 126 | reg = <6>; |
| 127 | }; |
| 128 | |
| 129 | mdio_slot4: mdio@7 { |
| 130 | #address-cells = <1>; |
| 131 | #size-cells = <0>; |
| 132 | reg = <7>; |
| 133 | }; |
| 134 | }; |
| 135 | }; |
| 136 | |
| 137 | &can0 { |
| 138 | status = "okay"; |
| 139 | }; |
| 140 | |
| 141 | &can1 { |
| 142 | status = "okay"; |
| 143 | }; |
| 144 | |
| 145 | &dspi0 { |
| 146 | bus-num = <0>; |
| 147 | status = "okay"; |
| 148 | |
| 149 | flash@0 { |
| 150 | #address-cells = <1>; |
| 151 | #size-cells = <1>; |
| 152 | compatible = "jedec,spi-nor"; |
| 153 | spi-cpol; |
| 154 | spi-cpha; |
| 155 | reg = <0>; |
| 156 | spi-max-frequency = <10000000>; |
| 157 | }; |
| 158 | |
| 159 | flash@1 { |
| 160 | #address-cells = <1>; |
| 161 | #size-cells = <1>; |
| 162 | compatible = "jedec,spi-nor"; |
| 163 | spi-cpol; |
| 164 | spi-cpha; |
| 165 | reg = <1>; |
| 166 | spi-max-frequency = <10000000>; |
| 167 | }; |
| 168 | |
| 169 | flash@2 { |
| 170 | #address-cells = <1>; |
| 171 | #size-cells = <1>; |
| 172 | compatible = "jedec,spi-nor"; |
| 173 | spi-cpol; |
| 174 | spi-cpha; |
| 175 | reg = <2>; |
| 176 | spi-max-frequency = <10000000>; |
| 177 | }; |
| 178 | }; |
| 179 | |
| 180 | &dspi1 { |
| 181 | bus-num = <1>; |
| 182 | status = "okay"; |
| 183 | |
| 184 | flash@0 { |
| 185 | #address-cells = <1>; |
| 186 | #size-cells = <1>; |
| 187 | compatible = "jedec,spi-nor"; |
| 188 | spi-cpol; |
| 189 | spi-cpha; |
| 190 | reg = <0>; |
| 191 | spi-max-frequency = <10000000>; |
| 192 | }; |
| 193 | |
| 194 | flash@1 { |
| 195 | #address-cells = <1>; |
| 196 | #size-cells = <1>; |
| 197 | compatible = "jedec,spi-nor"; |
| 198 | spi-cpol; |
| 199 | spi-cpha; |
| 200 | reg = <1>; |
| 201 | spi-max-frequency = <10000000>; |
| 202 | }; |
| 203 | |
| 204 | flash@2 { |
| 205 | #address-cells = <1>; |
| 206 | #size-cells = <1>; |
| 207 | compatible = "jedec,spi-nor"; |
| 208 | spi-cpol; |
| 209 | spi-cpha; |
| 210 | reg = <2>; |
| 211 | spi-max-frequency = <10000000>; |
| 212 | }; |
| 213 | }; |
| 214 | |
| 215 | &dspi2 { |
| 216 | bus-num = <2>; |
| 217 | status = "okay"; |
| 218 | |
| 219 | flash@0 { |
| 220 | #address-cells = <1>; |
| 221 | #size-cells = <1>; |
| 222 | compatible = "jedec,spi-nor"; |
| 223 | spi-cpol; |
| 224 | spi-cpha; |
| 225 | reg = <0>; |
| 226 | spi-max-frequency = <10000000>; |
| 227 | }; |
| 228 | }; |
| 229 | |
| 230 | &duart0 { |
| 231 | status = "okay"; |
| 232 | }; |
| 233 | |
| 234 | &duart1 { |
| 235 | status = "okay"; |
| 236 | }; |
| 237 | |
| 238 | &enetc_port1 { |
| 239 | phy-handle = <&qds_phy1>; |
| 240 | phy-mode = "rgmii-id"; |
| 241 | status = "okay"; |
| 242 | }; |
| 243 | |
| 244 | &enetc_port2 { |
| 245 | status = "okay"; |
| 246 | }; |
| 247 | |
| 248 | &esdhc { |
| 249 | status = "okay"; |
| 250 | }; |
| 251 | |
| 252 | &esdhc1 { |
| 253 | status = "okay"; |
| 254 | }; |
| 255 | |
| 256 | &fspi { |
| 257 | status = "okay"; |
| 258 | |
| 259 | mt35xu02g0: flash@0 { |
| 260 | compatible = "jedec,spi-nor"; |
| 261 | #address-cells = <1>; |
| 262 | #size-cells = <1>; |
| 263 | spi-max-frequency = <50000000>; |
| 264 | /* The following setting enables 1-1-8 (CMD-ADDR-DATA) mode */ |
| 265 | spi-rx-bus-width = <8>; /* 8 SPI Rx lines */ |
| 266 | spi-tx-bus-width = <1>; /* 1 SPI Tx line */ |
| 267 | reg = <0>; |
| 268 | }; |
| 269 | }; |
| 270 | |
| 271 | &ftm_alarm1 { |
| 272 | status = "okay"; |
| 273 | }; |
| 274 | |
| 275 | &i2c0 { |
| 276 | status = "okay"; |
| 277 | |
| 278 | i2c-mux@77 { |
| 279 | compatible = "nxp,pca9547"; |
| 280 | reg = <0x77>; |
| 281 | #address-cells = <1>; |
| 282 | #size-cells = <0>; |
| 283 | |
| 284 | i2c@2 { |
| 285 | #address-cells = <1>; |
| 286 | #size-cells = <0>; |
| 287 | reg = <0x2>; |
| 288 | |
| 289 | current-monitor@40 { |
| 290 | compatible = "ti,ina220"; |
| 291 | reg = <0x40>; |
| 292 | shunt-resistor = <1000>; |
| 293 | }; |
| 294 | |
| 295 | current-monitor@41 { |
| 296 | compatible = "ti,ina220"; |
| 297 | reg = <0x41>; |
| 298 | shunt-resistor = <1000>; |
| 299 | }; |
| 300 | }; |
| 301 | |
| 302 | i2c@3 { |
| 303 | #address-cells = <1>; |
| 304 | #size-cells = <0>; |
| 305 | reg = <0x3>; |
| 306 | |
| 307 | temperature-sensor@4c { |
| 308 | compatible = "nxp,sa56004"; |
| 309 | reg = <0x4c>; |
| 310 | vcc-supply = <&sb_3v3>; |
| 311 | }; |
| 312 | |
| 313 | eeprom@56 { |
| 314 | compatible = "atmel,24c512"; |
| 315 | reg = <0x56>; |
| 316 | }; |
| 317 | |
| 318 | eeprom@57 { |
| 319 | compatible = "atmel,24c512"; |
| 320 | reg = <0x57>; |
| 321 | }; |
| 322 | }; |
| 323 | |
| 324 | i2c@5 { |
| 325 | #address-cells = <1>; |
| 326 | #size-cells = <0>; |
| 327 | reg = <0x5>; |
| 328 | |
| 329 | sgtl5000: audio-codec@a { |
| 330 | #sound-dai-cells = <0>; |
| 331 | compatible = "fsl,sgtl5000"; |
| 332 | reg = <0xa>; |
| 333 | VDDA-supply = <®_1p8v>; |
| 334 | VDDIO-supply = <®_1p8v>; |
| 335 | clocks = <&sys_mclk>; |
| 336 | }; |
| 337 | }; |
| 338 | }; |
| 339 | |
| 340 | fpga@66 { |
| 341 | compatible = "fsl,ls1028aqds-fpga", "fsl,fpga-qixis-i2c", |
| 342 | "simple-mfd"; |
| 343 | reg = <0x66>; |
| 344 | |
| 345 | mux: mux-controller { |
| 346 | compatible = "reg-mux"; |
| 347 | #mux-control-cells = <1>; |
| 348 | mux-reg-masks = <0x54 0xf0>; /* 0: reg 0x54, bits 7:4 */ |
| 349 | }; |
| 350 | }; |
| 351 | |
| 352 | }; |
| 353 | |
| 354 | &i2c1 { |
| 355 | status = "okay"; |
| 356 | |
| 357 | rtc@51 { |
| 358 | compatible = "nxp,pcf2129"; |
| 359 | reg = <0x51>; |
| 360 | }; |
| 361 | }; |
| 362 | |
| 363 | &lpuart0 { |
| 364 | status = "okay"; |
| 365 | }; |
| 366 | |
| 367 | &lpuart1 { |
| 368 | status = "okay"; |
| 369 | }; |
| 370 | |
| 371 | &mscc_felix_port4 { |
| 372 | ethernet = <&enetc_port2>; |
| 373 | status = "okay"; |
| 374 | }; |
| 375 | |
| 376 | &sai1 { |
| 377 | status = "okay"; |
| 378 | }; |
| 379 | |
| 380 | &sata { |
| 381 | status = "okay"; |
| 382 | }; |
| 383 | |
| 384 | &usb0 { |
| 385 | dr_mode = "host"; |
| 386 | status = "okay"; |
| 387 | }; |
| 388 | |
| 389 | &usb1 { |
| 390 | dr_mode = "host"; |
| 391 | status = "okay"; |
| 392 | }; |