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git01.mediatek.com / filogic / uboot / b302747b8261b9d43f9a9a101af3ac46ee7bd14f / . / configs / UCP1020_SPIFLASH_defconfig
blob: d75c1f3906a9ed7bd3b33352bc31462dbbd9f591 [file] [log] [blame]
Oleksandr G Zhadan19ac6882015-04-29 16:57:39 -0400[diff] [blame]1CONFIG_PPC=y
Tom Rini07edfae2018-02-03 12:10:38 -0500[diff] [blame]2CONFIG_SYS_TEXT_BASE=0x11000000
Oleksandr G Zhadan19ac6882015-04-29 16:57:39 -0400[diff] [blame]3CONFIG_MPC85xx=y
4CONFIG_TARGET_UCP1020=y
5CONFIG_TARGET_UCP1020_SPIFLASH=y
Simon Glasse3ee2fb2016-02-22 22:55:43 -0700[diff] [blame]6CONFIG_FIT=y
7CONFIG_FIT_VERBOSE=y
8CONFIG_OF_BOARD_SETUP=y
9CONFIG_OF_STDOUT_VIA_ALIAS=y
Adam Ford10541762018-07-29 13:13:29 -0500[diff] [blame]10# CONFIG_MISC_INIT_R is not set
Simon Glass7a99a872017-01-23 13:31:20 -0700[diff] [blame]11CONFIG_BOARD_EARLY_INIT_F=y
Mario Six75b23ed2018-03-28 14:38:15 +0200[diff] [blame]12CONFIG_BOARD_EARLY_INIT_R=y
Mario Six8febc7a2018-03-28 14:38:16 +0200[diff] [blame]13CONFIG_LAST_STAGE_INIT=y
Tom Rinif852e732016-04-21 21:37:19 -0400[diff] [blame]14CONFIG_HUSH_PARSER=y
Adam Ford58dbf862018-02-06 07:58:59 -0600[diff] [blame]15# CONFIG_AUTO_COMPLETE is not set
Stefan Roese83da3f12015-05-18 14:08:23 +0200[diff] [blame]16CONFIG_AUTOBOOT_KEYED=y
17CONFIG_AUTOBOOT_PROMPT="Autobooting in %d seconds, press \"<Esc>\" to stop\n"
18CONFIG_AUTOBOOT_STOP_STR="\x1b"
Tuomas Tynkkynen28d56bd2017-10-08 21:48:01 +0300[diff] [blame]19CONFIG_CMD_IMLS=y
Tom Rini78873cd2017-08-14 19:58:53 -0400[diff] [blame]20CONFIG_CMD_GPIO=y
21CONFIG_CMD_I2C=y
Tom Rini1d9ac832016-04-24 17:29:26 -0400[diff] [blame]22CONFIG_CMD_MMC=y
Tom Rini00448d22017-07-28 21:31:42 -0400[diff] [blame]23# CONFIG_CMD_NAND is not set
Tom Rini78873cd2017-08-14 19:58:53 -0400[diff] [blame]24CONFIG_CMD_MMC_SPI=y
Tom Rini0f2dcb92016-04-22 16:41:25 -0400[diff] [blame]25CONFIG_CMD_SF=y
26CONFIG_CMD_SPI=y
Tom Rini0f2dcb92016-04-22 16:41:25 -0400[diff] [blame]27CONFIG_CMD_USB=y
Tom Rini0f2dcb92016-04-22 16:41:25 -0400[diff] [blame]28CONFIG_CMD_DHCP=y
Tom Rini1d9ac832016-04-24 17:29:26 -0400[diff] [blame]29CONFIG_CMD_MII=y
Tom Rini0f2dcb92016-04-22 16:41:25 -0400[diff] [blame]30CONFIG_CMD_PING=y
Chris Packham3e257df2017-04-29 15:20:28 +1200[diff] [blame]31CONFIG_CMD_DATE=y
Siva Durga Prasad Paladugu8e45f1a2018-06-19 12:24:23 +0200[diff] [blame]32CONFIG_MP=y
Tom Rini256aa742017-06-19 09:47:40 -0400[diff] [blame]33# CONFIG_CMD_HASH is not set
Simon Glass519805e2017-04-26 22:28:03 -0600[diff] [blame]34CONFIG_CMD_CRAMFS=y
Tom Rini1d9ac832016-04-24 17:29:26 -0400[diff] [blame]35CONFIG_CMD_EXT2=y
36CONFIG_CMD_FAT=y
Tom Rini5b0b0402017-08-28 07:16:32 -0400[diff] [blame]37CONFIG_ENV_IS_IN_SPI_FLASH=y
Mario Six41d7d972018-03-28 14:38:19 +0200[diff] [blame]38CONFIG_FSL_ESDHC=y
Masahiro Yamada8cea9b52017-02-11 22:43:54 +0900[diff] [blame]39CONFIG_MTD_NOR_FLASH=y
Adam Ford76da1b22018-10-14 15:10:50 -0500[diff] [blame]40CONFIG_FLASH_CFI_DRIVER=y
41CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
42CONFIG_SYS_FLASH_CFI=y
Joe Hershberger17491a82015-06-22 16:15:29 -0500[diff] [blame]43CONFIG_SPI_FLASH=y
Bin Meng27f5b192015-11-25 05:34:54 -0800[diff] [blame]44CONFIG_SPI_FLASH_STMICRO=y
45CONFIG_SPI_FLASH_SST=y
46CONFIG_SPI_FLASH_WINBOND=y
Mario Sixf504d1a2018-04-27 14:52:21 +0200[diff] [blame]47CONFIG_PHY_MARVELL=y
Tom Rinica22e962017-08-07 22:00:34 -0400[diff] [blame]48CONFIG_PHY_GIGE=y
Simon Glass9008a5b2015-08-19 09:33:43 -0600[diff] [blame]49CONFIG_E1000=y
Adam Ford53705472018-07-20 23:03:57 -0500[diff] [blame]50CONFIG_MII=y
Mario Sixda4fc932018-03-28 14:38:18 +0200[diff] [blame]51CONFIG_TSEC_ENET=y
Thomas Choua6cec012015-11-19 21:48:14 +0800[diff] [blame]52CONFIG_SYS_NS16550=y
Adam Ford4e96ff82018-04-15 13:51:26 -0400[diff] [blame]53CONFIG_SPI=y
Bin Meng72a049d2015-11-25 05:34:53 -0800[diff] [blame]54CONFIG_FSL_ESPI=y
Tom Rini6e9cb112016-09-08 16:31:26 -0400[diff] [blame]55CONFIG_USB=y
56CONFIG_USB_STORAGE=y
Simon Glass690f5092017-04-26 22:28:04 -0600[diff] [blame]57CONFIG_FS_CRAMFS=y
Simon Glassa66c5412016-02-22 22:55:42 -0700[diff] [blame]58CONFIG_OF_LIBFDT=y