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wdenkc4cbd342005-01-09 18:21:42 +00001/*
2 * Configuation settings for the Sentec Cobra Board.
3 *
4 * (C) Copyright 2003 Josef Baumgartner <josef.baumgartner@telex.de>
5 *
Wolfgang Denkbd8ec7e2013-10-07 13:07:26 +02006 * SPDX-License-Identifier: GPL-2.0+
wdenkc4cbd342005-01-09 18:21:42 +00007 */
8
9/* ---
10 * Version: U-boot 1.0.0 - initial release for Sentec COBRA5272 board
11 * Date: 2004-03-29
12 * Author: Florian Schlote
13 *
14 * For a description of configuration options please refer also to the
15 * general u-boot-1.x.x/README file
16 * ---
17 */
18
19/* ---
20 * board/config.h - configuration options, board specific
21 * ---
22 */
23
24#ifndef _CONFIG_COBRA5272_H
25#define _CONFIG_COBRA5272_H
26
27/* ---
wdenkc4cbd342005-01-09 18:21:42 +000028 * Defines processor clock - important for correct timings concerning serial
29 * interface etc.
wdenkc4cbd342005-01-09 18:21:42 +000030 * ---
31 */
32
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020033#define CONFIG_SYS_CLK 66000000
34#define CONFIG_SYS_SDRAM_SIZE 16 /* SDRAM size in MB */
wdenkc4cbd342005-01-09 18:21:42 +000035
36/* ---
37 * Enable use of Ethernet
38 * ---
39 */
TsiChungLiewcfa2b482007-08-15 19:41:06 -050040#define CONFIG_MCFFEC
wdenkc4cbd342005-01-09 18:21:42 +000041
TsiChungLiewcfa2b482007-08-15 19:41:06 -050042/* Enable Dma Timer */
43#define CONFIG_MCFTMR
wdenkc4cbd342005-01-09 18:21:42 +000044
45/* ---
46 * Define baudrate for UART1 (console output, tftp, ...)
47 * default value of CONFIG_BAUDRATE for Sentec board: 19200 baud
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020048 * CONFIG_SYS_BAUDRATE_TABLE defines values that can be selected in u-boot command
wdenkc4cbd342005-01-09 18:21:42 +000049 * interface
50 * ---
51 */
52
TsiChungLiewcfa2b482007-08-15 19:41:06 -050053#define CONFIG_MCFUART
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020054#define CONFIG_SYS_UART_PORT (0)
wdenkc4cbd342005-01-09 18:21:42 +000055#define CONFIG_BAUDRATE 19200
wdenkc4cbd342005-01-09 18:21:42 +000056
57/* ---
58 * set "#if 0" to "#if 1" if (Hardware)-WATCHDOG should be enabled & change
59 * timeout acc. to your needs
60 * #define CONFIG_WATCHDOG_TIMEOUT x , x is timeout in milliseconds, e. g. 10000
61 * for 10 sec
62 * ---
63 */
64
65#if 0
66#define CONFIG_WATCHDOG
67#define CONFIG_WATCHDOG_TIMEOUT 10000 /* timeout in milliseconds */
68#endif
69
70/* ---
71 * CONFIG_MONITOR_IS_IN_RAM defines if u-boot is started from a different
72 * bootloader residing in flash ('chainloading'); if you want to use
73 * chainloading or want to compile a u-boot binary that can be loaded into
74 * RAM via BDM set
Wolfgang Denka1be4762008-05-20 16:00:29 +020075 * "#if 0" to "#if 1"
wdenkc4cbd342005-01-09 18:21:42 +000076 * You will need a first stage bootloader then, e. g. colilo or a working BDM
77 * cable (Background Debug Mode)
78 *
79 * Setting #if 0: u-boot will start from flash and relocate itself to RAM
80 *
Wolfgang Denk0708bc62010-10-07 21:51:12 +020081 * Please do not forget to modify the setting of CONFIG_SYS_TEXT_BASE
wdenkc4cbd342005-01-09 18:21:42 +000082 * in board/cobra5272/config.mk accordingly (#if 0: 0xffe00000; #if 1: 0x20000)
83 *
84 * ---
85 */
86
87#if 0
88#define CONFIG_MONITOR_IS_IN_RAM /* monitor is started from a preloader */
89#endif
90
91/* ---
92 * Configuration for environment
93 * Environment is embedded in u-boot in the second sector of the flash
94 * ---
95 */
96
97#ifndef CONFIG_MONITOR_IS_IN_RAM
Jean-Christophe PLAGNIOL-VILLARD7e1cda62008-09-10 22:48:06 +020098#define CONFIG_ENV_OFFSET 0x4000
99#define CONFIG_ENV_SECT_SIZE 0x2000
Jean-Christophe PLAGNIOL-VILLARD53db4cd2008-09-10 22:48:04 +0200100#define CONFIG_ENV_IS_IN_FLASH 1
wdenkc4cbd342005-01-09 18:21:42 +0000101#else
Jean-Christophe PLAGNIOL-VILLARD7e1cda62008-09-10 22:48:06 +0200102#define CONFIG_ENV_ADDR 0xffe04000
103#define CONFIG_ENV_SECT_SIZE 0x2000
Jean-Christophe PLAGNIOL-VILLARD53db4cd2008-09-10 22:48:04 +0200104#define CONFIG_ENV_IS_IN_FLASH 1
wdenkc4cbd342005-01-09 18:21:42 +0000105#endif
106
Jon Loeliger37ec35e2007-07-04 22:31:56 -0500107
108/*
Jon Loeligere54e77a2007-07-10 09:29:01 -0500109 * BOOTP options
110 */
111#define CONFIG_BOOTP_BOOTFILESIZE
112#define CONFIG_BOOTP_BOOTPATH
113#define CONFIG_BOOTP_GATEWAY
114#define CONFIG_BOOTP_HOSTNAME
115
116
117/*
Jon Loeliger37ec35e2007-07-04 22:31:56 -0500118 * Command line configuration.
wdenkc4cbd342005-01-09 18:21:42 +0000119 */
Jon Loeliger37ec35e2007-07-04 22:31:56 -0500120#include <config_cmd_default.h>
wdenkc4cbd342005-01-09 18:21:42 +0000121
Jon Loeliger37ec35e2007-07-04 22:31:56 -0500122#define CONFIG_CMD_PING
wdenkc4cbd342005-01-09 18:21:42 +0000123
Jon Loeliger37ec35e2007-07-04 22:31:56 -0500124#undef CONFIG_CMD_LOADS
125#undef CONFIG_CMD_LOADB
126#undef CONFIG_CMD_MII
127
TsiChungLiewcfa2b482007-08-15 19:41:06 -0500128#ifdef CONFIG_MCFFEC
TsiChungLiewcfa2b482007-08-15 19:41:06 -0500129# define CONFIG_MII 1
TsiChung Liewb3162452008-03-30 01:22:13 -0500130# define CONFIG_MII_INIT 1
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200131# define CONFIG_SYS_DISCOVER_PHY
132# define CONFIG_SYS_RX_ETH_BUFFER 8
133# define CONFIG_SYS_FAULT_ECHO_LINK_DOWN
TsiChungLiewcfa2b482007-08-15 19:41:06 -0500134
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200135# define CONFIG_SYS_FEC0_PINMUX 0
136# define CONFIG_SYS_FEC0_MIIBASE CONFIG_SYS_FEC0_IOBASE
Wolfgang Denka1be4762008-05-20 16:00:29 +0200137# define MCFFEC_TOUT_LOOP 50000
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200138/* If CONFIG_SYS_DISCOVER_PHY is not defined - hardcoded */
139# ifndef CONFIG_SYS_DISCOVER_PHY
TsiChungLiewcfa2b482007-08-15 19:41:06 -0500140# define FECDUPLEX FULL
141# define FECSPEED _100BASET
142# else
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200143# ifndef CONFIG_SYS_FAULT_ECHO_LINK_DOWN
144# define CONFIG_SYS_FAULT_ECHO_LINK_DOWN
TsiChungLiewcfa2b482007-08-15 19:41:06 -0500145# endif
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200146# endif /* CONFIG_SYS_DISCOVER_PHY */
TsiChungLiewcfa2b482007-08-15 19:41:06 -0500147#endif
wdenkc4cbd342005-01-09 18:21:42 +0000148
149/*
150 *-----------------------------------------------------------------------------
151 * Define user parameters that have to be customized most likely
152 *-----------------------------------------------------------------------------
153 */
154
155/*AUTOBOOT settings - booting images automatically by u-boot after power on*/
156
157#define CONFIG_BOOTDELAY 5 /* used for autoboot, delay in
158seconds u-boot will wait before starting defined (auto-)boot command, setting
159to -1 disables delay, setting to 0 will too prevent access to u-boot command
160interface: u-boot then has to reflashed */
161
162
163/* The following settings will be contained in the environment block ; if you
164want to use a neutral environment all those settings can be manually set in
165u-boot: 'set' command */
166
167#if 0
168
169#define CONFIG_BOOTCOMMAND "bootm 0xffe80000" /*Autoboto command, please
170enter a valid image address in flash */
171
172#define CONFIG_BOOTARGS " " /* default bootargs that are
173considered during boot */
174
175/* User network settings */
176
177#define CONFIG_ETHADDR 00:00:00:00:00:09 /* default ethernet MAC addr. */
178#define CONFIG_IPADDR 192.168.100.2 /* default board IP address */
179#define CONFIG_SERVERIP 192.168.100.1 /* default tftp server IP address */
180
181#endif
182
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200183#define CONFIG_SYS_PROMPT "COBRA > " /* Layout of u-boot prompt*/
wdenkc4cbd342005-01-09 18:21:42 +0000184
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200185#define CONFIG_SYS_LOAD_ADDR 0x20000 /*Defines default RAM address
wdenkc4cbd342005-01-09 18:21:42 +0000186from which user programs will be started */
187
188/*---*/
189
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200190#define CONFIG_SYS_LONGHELP /* undef to save memory */
wdenkc4cbd342005-01-09 18:21:42 +0000191
Jon Loeliger37ec35e2007-07-04 22:31:56 -0500192#if defined(CONFIG_CMD_KGDB)
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200193#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
wdenkc4cbd342005-01-09 18:21:42 +0000194#else
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200195#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
wdenkc4cbd342005-01-09 18:21:42 +0000196#endif
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200197#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
198#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
199#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
wdenkc4cbd342005-01-09 18:21:42 +0000200
201/*
202 *-----------------------------------------------------------------------------
203 * End of user parameters to be customized
204 *-----------------------------------------------------------------------------
205 */
206
207/* ---
208 * Defines memory range for test
209 * ---
210 */
211
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200212#define CONFIG_SYS_MEMTEST_START 0x400
213#define CONFIG_SYS_MEMTEST_END 0x380000
wdenkc4cbd342005-01-09 18:21:42 +0000214
215/* ---
216 * Low Level Configuration Settings
217 * (address mappings, register initial values, etc.)
218 * You should know what you are doing if you make changes here.
219 * ---
220 */
221
222/* ---
223 * Base register address
224 * ---
225 */
226
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200227#define CONFIG_SYS_MBAR 0x10000000 /* Register Base Addrs */
wdenkc4cbd342005-01-09 18:21:42 +0000228
229/* ---
230 * System Conf. Reg. & System Protection Reg.
231 * ---
232 */
233
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200234#define CONFIG_SYS_SCR 0x0003
235#define CONFIG_SYS_SPR 0xffff
wdenkc4cbd342005-01-09 18:21:42 +0000236
237/* ---
238 * Ethernet settings
239 * ---
240 */
241
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200242#define CONFIG_SYS_DISCOVER_PHY
243#define CONFIG_SYS_ENET_BD_BASE 0x780000
wdenkc4cbd342005-01-09 18:21:42 +0000244
245/*-----------------------------------------------------------------------
246 * Definitions for initial stack pointer and data area (in internal SRAM)
247 */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200248#define CONFIG_SYS_INIT_RAM_ADDR 0x20000000
Wolfgang Denk1c2e98e2010-10-26 13:32:32 +0200249#define CONFIG_SYS_INIT_RAM_SIZE 0x1000 /* Size of used area in internal SRAM */
Wolfgang Denk0191e472010-10-26 14:34:52 +0200250#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200251#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
wdenkc4cbd342005-01-09 18:21:42 +0000252
253/*-----------------------------------------------------------------------
254 * Start addresses for the final memory configuration
255 * (Set up by the startup code)
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200256 * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0
wdenkc4cbd342005-01-09 18:21:42 +0000257 */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200258#define CONFIG_SYS_SDRAM_BASE 0x00000000
wdenkc4cbd342005-01-09 18:21:42 +0000259
260/*
261 *-------------------------------------------------------------------------
262 * RAM SIZE (is defined above)
263 *-----------------------------------------------------------------------
264 */
265
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200266/* #define CONFIG_SYS_SDRAM_SIZE 16 */
wdenkc4cbd342005-01-09 18:21:42 +0000267
268/*
269 *-----------------------------------------------------------------------
270 */
271
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200272#define CONFIG_SYS_FLASH_BASE 0xffe00000
wdenkc4cbd342005-01-09 18:21:42 +0000273
274#ifdef CONFIG_MONITOR_IS_IN_RAM
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200275#define CONFIG_SYS_MONITOR_BASE 0x20000
wdenkc4cbd342005-01-09 18:21:42 +0000276#else
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200277#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE + 0x400)
wdenkc4cbd342005-01-09 18:21:42 +0000278#endif
279
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200280#define CONFIG_SYS_MONITOR_LEN 0x20000
281#define CONFIG_SYS_MALLOC_LEN (256 << 10)
282#define CONFIG_SYS_BOOTPARAMS_LEN 64*1024
wdenkc4cbd342005-01-09 18:21:42 +0000283
284/*
285 * For booting Linux, the board info and command line data
286 * have to be in the first 8 MB of memory, since this is
287 * the maximum mapped by the Linux kernel during initialization ??
288 */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200289#define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
wdenkc4cbd342005-01-09 18:21:42 +0000290
291/*-----------------------------------------------------------------------
292 * FLASH organization
293 */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200294#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */
295#define CONFIG_SYS_MAX_FLASH_SECT 11 /* max number of sectors on one chip */
296#define CONFIG_SYS_FLASH_ERASE_TOUT 1000 /* flash timeout */
wdenkc4cbd342005-01-09 18:21:42 +0000297
298/*-----------------------------------------------------------------------
299 * Cache Configuration
300 */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200301#define CONFIG_SYS_CACHELINE_SIZE 16
wdenkc4cbd342005-01-09 18:21:42 +0000302
TsiChung Liew0ee47d42010-03-11 22:12:53 -0600303#define ICACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \
Wolfgang Denk1c2e98e2010-10-26 13:32:32 +0200304 CONFIG_SYS_INIT_RAM_SIZE - 8)
TsiChung Liew0ee47d42010-03-11 22:12:53 -0600305#define DCACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \
Wolfgang Denk1c2e98e2010-10-26 13:32:32 +0200306 CONFIG_SYS_INIT_RAM_SIZE - 4)
TsiChung Liew0ee47d42010-03-11 22:12:53 -0600307#define CONFIG_SYS_ICACHE_INV (CF_CACR_CINV | CF_CACR_INVI)
308#define CONFIG_SYS_CACHE_ACR0 (CONFIG_SYS_SDRAM_BASE | \
309 CF_ADDRMASK(CONFIG_SYS_SDRAM_SIZE) | \
310 CF_ACR_EN | CF_ACR_SM_ALL)
311#define CONFIG_SYS_CACHE_ICACR (CF_CACR_CENB | CF_CACR_CINV | \
312 CF_CACR_DISD | CF_CACR_INVI | \
313 CF_CACR_CEIB | CF_CACR_DCM | \
314 CF_CACR_EUSP)
315
wdenkc4cbd342005-01-09 18:21:42 +0000316/*-----------------------------------------------------------------------
317 * Memory bank definitions
318 *
319 * Please refer also to Motorola Coldfire user manual - Chapter XXX
320 * <http://e-www.motorola.com/files/dsp/doc/ref_manual/MCF5272UM.pdf>
321 */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200322#define CONFIG_SYS_BR0_PRELIM 0xFFE00201
323#define CONFIG_SYS_OR0_PRELIM 0xFFE00014
wdenkc4cbd342005-01-09 18:21:42 +0000324
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200325#define CONFIG_SYS_BR1_PRELIM 0
326#define CONFIG_SYS_OR1_PRELIM 0
wdenkc4cbd342005-01-09 18:21:42 +0000327
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200328#define CONFIG_SYS_BR2_PRELIM 0
329#define CONFIG_SYS_OR2_PRELIM 0
wdenkc4cbd342005-01-09 18:21:42 +0000330
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200331#define CONFIG_SYS_BR3_PRELIM 0
332#define CONFIG_SYS_OR3_PRELIM 0
wdenkc4cbd342005-01-09 18:21:42 +0000333
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200334#define CONFIG_SYS_BR4_PRELIM 0
335#define CONFIG_SYS_OR4_PRELIM 0
wdenkc4cbd342005-01-09 18:21:42 +0000336
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200337#define CONFIG_SYS_BR5_PRELIM 0
338#define CONFIG_SYS_OR5_PRELIM 0
wdenkc4cbd342005-01-09 18:21:42 +0000339
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200340#define CONFIG_SYS_BR6_PRELIM 0
341#define CONFIG_SYS_OR6_PRELIM 0
wdenkc4cbd342005-01-09 18:21:42 +0000342
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200343#define CONFIG_SYS_BR7_PRELIM 0x00000701
344#define CONFIG_SYS_OR7_PRELIM 0xFF00007C
wdenkc4cbd342005-01-09 18:21:42 +0000345
346/*-----------------------------------------------------------------------
347 * LED config
348 */
349#define LED_STAT_0 0xffff /*all LEDs off*/
350#define LED_STAT_1 0xfffe
351#define LED_STAT_2 0xfffd
352#define LED_STAT_3 0xfffb
353#define LED_STAT_4 0xfff7
354#define LED_STAT_5 0xffef
355#define LED_STAT_6 0xffdf
356#define LED_STAT_7 0xff00 /*all LEDs on*/
357
358/*-----------------------------------------------------------------------
359 * Port configuration (GPIO)
360 */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200361#define CONFIG_SYS_PACNT 0x00000000 /* PortA control reg.: All pins are external
wdenkc4cbd342005-01-09 18:21:42 +0000362GPIO*/
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200363#define CONFIG_SYS_PADDR 0x00FF /* PortA direction reg.: PA7 to PA0 are outputs
wdenkc4cbd342005-01-09 18:21:42 +0000364(1^=output, 0^=input) */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200365#define CONFIG_SYS_PADAT LED_STAT_0 /* PortA value reg.: Turn all LED off */
366#define CONFIG_SYS_PBCNT 0x55554155 /* PortB control reg.: Ethernet/UART
wdenkc4cbd342005-01-09 18:21:42 +0000367configuration */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200368#define CONFIG_SYS_PBDDR 0x0000 /* PortB direction: All pins configured as inputs */
369#define CONFIG_SYS_PBDAT 0x0000 /* PortB value reg. */
370#define CONFIG_SYS_PDCNT 0x00000000 /* PortD control reg. */
wdenkc4cbd342005-01-09 18:21:42 +0000371
372#endif /* _CONFIG_COBRA5272_H */