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git01.mediatek.com / filogic / uboot / b275e7681a9eb8325980f6309682e09c1e7bdb7b / . / arch / arm / dts / tegra20-trimslice.dts
blob: db13ff965178dcedb0df08312493432ffc3cfdc4 [file] [log] [blame]
Stephen Warrena69a33d2012-05-16 13:54:07 +0000[diff] [blame]1/dts-v1/;
2
Tom Warrenf6236152013-02-21 12:31:27 +0000[diff] [blame]3#include "tegra20.dtsi"
Stephen Warrena69a33d2012-05-16 13:54:07 +0000[diff] [blame]4
5/ {
6 model = "Compulab TrimSlice board";
7 compatible = "compulab,trimslice", "nvidia,tegra20";
8
Simon Glass0c24f372014-09-04 16:27:35 -0600[diff] [blame]9 chosen {
10 stdout-path = &uarta;
11 };
12
Stephen Warrena69a33d2012-05-16 13:54:07 +0000[diff] [blame]13 aliases {
14 usb0 = "/usb@c5008000";
Stephen Warrendbe5bb52012-11-01 12:14:37 +0000[diff] [blame]15 usb1 = "/usb@c5000000";
Tom Warrened955272013-02-21 12:31:29 +0000[diff] [blame]16 sdhci0 = "/sdhci@c8000600";
17 sdhci1 = "/sdhci@c8000000";
Simon Glassb4381ee2014-10-13 23:42:12 -0600[diff] [blame]18 spi0 = "/spi@7000c380";
Stephen Warrena69a33d2012-05-16 13:54:07 +0000[diff] [blame]19 };
20
21 memory {
22 reg = <0x00000000 0x40000000>;
23 };
24
Stephen Warrena69a33d2012-05-16 13:54:07 +0000[diff] [blame]25 serial@70006000 {
26 clock-frequency = <216000000>;
27 };
28
Allen Martin523e4d62013-01-29 13:51:23 +0000[diff] [blame]29 spi@7000c380 {
30 status = "okay";
31 spi-max-frequency = <25000000>;
32 };
33
Thierry Reding811a9cc2014-12-09 22:25:14 -0700[diff] [blame]34 pcie-controller@80003000 {
35 status = "okay";
36
37 avdd-pex-supply = <&pci_vdd_reg>;
38 vdd-pex-supply = <&pci_vdd_reg>;
39 avdd-pex-pll-supply = <&pci_vdd_reg>;
40 avdd-plle-supply = <&pci_vdd_reg>;
41 vddio-pex-clk-supply = <&pci_clk_reg>;
42
43 pci@1,0 {
44 status = "okay";
45 };
46 };
47
Stephen Warren48edf192012-05-30 06:45:50 +0000[diff] [blame]48 usb@c5000000 {
Simon Glasse31a2a52016-01-30 16:37:52 -0700[diff] [blame]49 status = "okay";
Simon Glass3112fd52015-01-05 20:05:41 -0700[diff] [blame]50 nvidia,vbus-gpio = <&gpio TEGRA_GPIO(V, 2) GPIO_ACTIVE_HIGH>;
Stephen Warrena69a33d2012-05-16 13:54:07 +0000[diff] [blame]51 };
52
Tom Warrened955272013-02-21 12:31:29 +0000[diff] [blame]53 sdhci@c8000000 {
54 status = "okay";
55 bus-width = <4>;
56 };
57
58 sdhci@c8000600 {
59 status = "okay";
Simon Glass3112fd52015-01-05 20:05:41 -0700[diff] [blame]60 cd-gpios = <&gpio TEGRA_GPIO(P, 1) GPIO_ACTIVE_LOW>;
61 wp-gpios = <&gpio TEGRA_GPIO(P, 2) GPIO_ACTIVE_HIGH>;
Tom Warrened955272013-02-21 12:31:29 +0000[diff] [blame]62 bus-width = <4>;
63 };
Thierry Reding811a9cc2014-12-09 22:25:14 -0700[diff] [blame]64
Simon Glasse31a2a52016-01-30 16:37:52 -0700[diff] [blame]65 clocks {
66 compatible = "simple-bus";
67 #address-cells = <1>;
68 #size-cells = <0>;
69
70 clk32k_in: clock@0 {
71 compatible = "fixed-clock";
72 reg=<0>;
73 #clock-cells = <0>;
74 clock-frequency = <32768>;
75 };
76 };
77
Thierry Reding811a9cc2014-12-09 22:25:14 -0700[diff] [blame]78 regulators {
79 compatible = "simple-bus";
80 #address-cells = <1>;
81 #size-cells = <0>;
82
83 hdmi_vdd_reg: regulator@0 {
84 compatible = "regulator-fixed";
85 reg = <0>;
86 regulator-name = "avdd_hdmi";
87 regulator-min-microvolt = <3300000>;
88 regulator-max-microvolt = <3300000>;
89 regulator-always-on;
90 };
91
92 hdmi_pll_reg: regulator@1 {
93 compatible = "regulator-fixed";
94 reg = <1>;
95 regulator-name = "avdd_hdmi_pll";
96 regulator-min-microvolt = <1800000>;
97 regulator-max-microvolt = <1800000>;
98 regulator-always-on;
99 };
100
101 vbus_reg: regulator@2 {
102 compatible = "regulator-fixed";
103 reg = <2>;
104 regulator-name = "usb1_vbus";
105 regulator-min-microvolt = <5000000>;
106 regulator-max-microvolt = <5000000>;
107 enable-active-high;
Simon Glass3112fd52015-01-05 20:05:41 -0700[diff] [blame]108 gpio = <&gpio TEGRA_GPIO(V, 2) GPIO_ACTIVE_HIGH>;
Thierry Reding811a9cc2014-12-09 22:25:14 -0700[diff] [blame]109 regulator-always-on;
110 regulator-boot-on;
111 };
112
113 pci_clk_reg: regulator@3 {
114 compatible = "regulator-fixed";
115 reg = <3>;
116 regulator-name = "pci_clk";
117 regulator-min-microvolt = <3300000>;
118 regulator-max-microvolt = <3300000>;
119 regulator-always-on;
120 };
121
122 pci_vdd_reg: regulator@4 {
123 compatible = "regulator-fixed";
124 reg = <4>;
125 regulator-name = "pci_vdd";
126 regulator-min-microvolt = <1050000>;
127 regulator-max-microvolt = <1050000>;
128 regulator-always-on;
129 };
130 };
131
Stephen Warrena69a33d2012-05-16 13:54:07 +0000[diff] [blame]132};