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git01.mediatek.com / filogic / uboot / b275e7681a9eb8325980f6309682e09c1e7bdb7b / . / arch / arm / dts / exynos5250-spring.dts
blob: 693501e4c19ca8d7cf95aa798d97e12e4026be5d [file] [log] [blame]
Simon Glassb1398362015-08-03 08:19:37 -0600[diff] [blame]1/*
2 * Google Spring board device tree source
3 *
4 * Copyright (c) 2013 Google, Inc
5 * Copyright (c) 2014 SUSE LINUX Products GmbH
6 *
7 * SPDX-License-Identifier: GPL-2.0
8 */
9
10/dts-v1/;
11#include <dt-bindings/gpio/gpio.h>
12#include <dt-bindings/interrupt-controller/irq.h>
13#include <dt-bindings/input/input.h>
14#include "exynos5250.dtsi"
15
16/ {
17 model = "Google Spring";
18 compatible = "google,spring", "samsung,exynos5250", "samsung,exynos5";
19
20 aliases {
21 i2c0 = "/i2c@12C60000";
22 i2c1 = "/i2c@12C70000";
23 i2c2 = "/i2c@12C80000";
24 i2c3 = "/i2c@12C90000";
25 i2c4 = "/i2c@12CA0000";
26 i2c5 = "/i2c@12CB0000";
27 i2c6 = "/i2c@12CC0000";
28 i2c7 = "/i2c@12CD0000";
29 i2c104 = &cros_ec_ldo_tunnel;
30 spi0 = "/spi@12d20000";
31 spi1 = "/spi@12d30000";
32 spi2 = "/spi@12d40000";
33 spi3 = "/spi@131a0000";
34 spi4 = "/spi@131b0000";
35 mmc0 = "/mmc@12000000";
36 serial0 = "/serial@12C30000";
37 console = "/serial@12C30000";
38 i2s = "/sound@3830000";
39 };
40
41 memory {
42 reg = <0x40000000 0x80000000>;
43 };
44
45 flash@0 {
46 spl { /* spl size override */
47 size = <0x8000>;
48 };
49 };
50
51 chosen {
52 bootargs = "console=tty1";
53 stdout-path = "serial3:115200n8";
54 };
55
56 board-rev {
57 compatible = "google,board-revision";
58 google,board-rev-gpios = <&gpy4 0 0>, <&gpy4 1 0>,
59 <&gpy4 2 0>;
60 };
61
Simon Glass11328532015-08-22 18:31:37 -0600[diff] [blame]62 i2c@12C90000 {
63 clock-frequency = <100000>;
64 tpm@20 {
65 reg = <0x20>;
66 compatible = "infineon,slb9645tt";
67 };
68 };
69
Simon Glassb1398362015-08-03 08:19:37 -0600[diff] [blame]70 mmc@12200000 {
71 samsung,bus-width = <8>;
72 samsung,timing = <1 3 3>;
73 samsung,removable = <0>;
74 };
75
76 mmc@12210000 {
77 status = "disabled";
78 };
79
80 mmc@12220000 {
81 /* MMC2 pins are used as GPIO for eDP bridge */
82 status = "disabled";
83 };
84
85 mmc@12230000 {
86 status = "disabled";
87 };
88
89 ehci@12110000 {
90 samsung,vbus-gpio = <&gpx1 1 GPIO_ACTIVE_HIGH>;
91 status = "okay";
92 };
93
94 xhci@12000000 {
95 samsung,vbus-gpio = <&gpx2 7 GPIO_ACTIVE_HIGH>;
96 };
97
98 spi@12d30000 {
99 spi-max-frequency = <50000000>;
100 firmware_storage_spi: flash@0 {
101 compatible = "spi-flash";
102 reg = <0>;
103 };
104 };
105
106 tmu@10060000 {
107 samsung,min-temp = <25>;
108 samsung,max-temp = <125>;
109 samsung,start-warning = <95>;
110 samsung,start-tripping = <105>;
111 samsung,hw-tripping = <110>;
112 samsung,efuse-min-value = <40>;
113 samsung,efuse-value = <55>;
114 samsung,efuse-max-value = <100>;
115 samsung,slope = <274761730>;
116 samsung,dc-value = <25>;
117 };
118
119 fimd@14400000 {
120 samsung,vl-freq = <60>;
121 samsung,vl-col = <1366>;
122 samsung,vl-row = <768>;
123 samsung,vl-width = <1366>;
124 samsung,vl-height = <768>;
125
126 samsung,vl-clkp;
127 samsung,vl-dp;
128 samsung,vl-hsp;
129 samsung,vl-vsp;
130
131 samsung,vl-bpix = <4>;
132
133 samsung,vl-hspw = <32>;
134 samsung,vl-hbpd = <80>;
135 samsung,vl-hfpd = <48>;
136 samsung,vl-vspw = <5>;
137 samsung,vl-vbpd = <14>;
138 samsung,vl-vfpd = <3>;
139 samsung,vl-cmd-allow-len = <0xf>;
140
141 samsung,winid = <0>;
142 samsung,interface-mode = <1>;
143 samsung,dp-enabled = <1>;
144 samsung,dual-lcd-enabled = <0>;
145 };
146
147 dp@145b0000 {
148 samsung,lt-status = <0>;
149
150 samsung,master-mode = <0>;
151 samsung,bist-mode = <0>;
152 samsung,bist-pattern = <0>;
153 samsung,h-sync-polarity = <0>;
154 samsung,v-sync-polarity = <0>;
155 samsung,interlaced = <0>;
156 samsung,color-space = <0>;
157 samsung,dynamic-range = <0>;
158 samsung,ycbcr-coeff = <0>;
159 samsung,color-depth = <1>;
160 };
Simon Glass67063672016-02-21 21:08:58 -0700[diff] [blame]161
162 backlight: backlight {
163 compatible = "pwm-backlight";
164 pwms = <&pwm 0 1000000 0>;
165 brightness-levels = <0 100 500 1000 1500 2000 2500 2800>;
166 default-brightness-level = <1>;
167 enable-gpios = <&gpx3 0 GPIO_ACTIVE_HIGH>;
168 power-supply = <&fet1>;
169 };
170
171 panel: panel {
172 compatible = "auo,b116xw03";
173 power-supply = <&fet6>;
174 backlight = <&backlight>;
175
176 port {
177 panel_in: endpoint {
178 remote-endpoint = <&bridge_out>;
179 };
180 };
181 };
Simon Glassb1398362015-08-03 08:19:37 -0600[diff] [blame]182};
183
184&i2c_0 {
185 status = "okay";
186 samsung,i2c-sda-delay = <100>;
187 samsung,i2c-max-bus-freq = <378000>;
188
189 s5m8767-pmic@66 {
190 compatible = "samsung,s5m8767-pmic";
191 reg = <0x66>;
192 interrupt-parent = <&gpx3>;
193 wakeup-source;
194
195 s5m8767,pmic-buck-dvs-gpios = <&gpd1 0 GPIO_ACTIVE_LOW>, /* DVS1 */
196 <&gpd1 1 GPIO_ACTIVE_LOW>, /* DVS2 */
197 <&gpd1 2 GPIO_ACTIVE_LOW>; /* DVS3 */
198
199 s5m8767,pmic-buck-ds-gpios = <&gpx2 3 GPIO_ACTIVE_LOW>, /* SET1 */
200 <&gpx2 4 GPIO_ACTIVE_LOW>, /* SET2 */
201 <&gpx2 5 GPIO_ACTIVE_LOW>; /* SET3 */
202
203 /*
204 * The following arrays of DVS voltages are not used, since we are
205 * not using GPIOs to control PMIC bucks, but they must be defined
206 * to please the driver.
207 */
208 s5m8767,pmic-buck2-dvs-voltage = <1350000>, <1300000>,
209 <1250000>, <1200000>,
210 <1150000>, <1100000>,
211 <1000000>, <950000>;
212
213 s5m8767,pmic-buck3-dvs-voltage = <1100000>, <1100000>,
214 <1100000>, <1100000>,
215 <1000000>, <1000000>,
216 <1000000>, <1000000>;
217
218 s5m8767,pmic-buck4-dvs-voltage = <1200000>, <1200000>,
219 <1200000>, <1200000>,
220 <1200000>, <1200000>,
221 <1200000>, <1200000>;
222
223 clocks {
224 compatible = "samsung,s5m8767-clk";
225 #clock-cells = <1>;
226 clock-output-names = "en32khz_ap",
227 "en32khz_cp",
228 "en32khz_bt";
229 };
230
231 regulators {
232 ldo4_reg: LDO4 {
233 regulator-name = "P1.0V_LDO_OUT4";
234 regulator-min-microvolt = <1000000>;
235 regulator-max-microvolt = <1000000>;
236 regulator-always-on;
237 op_mode = <0>;
238 };
239
240 ldo5_reg: LDO5 {
241 regulator-name = "P1.8V_LDO_OUT5";
242 regulator-min-microvolt = <1800000>;
243 regulator-max-microvolt = <1800000>;
244 regulator-always-on;
245 op_mode = <0>;
246 };
247
248 ldo6_reg: LDO6 {
249 regulator-name = "vdd_mydp";
250 regulator-min-microvolt = <1200000>;
251 regulator-max-microvolt = <1200000>;
252 regulator-always-on;
253 op_mode = <3>;
254 };
255
256 ldo7_reg: LDO7 {
257 regulator-name = "P1.1V_LDO_OUT7";
258 regulator-min-microvolt = <1100000>;
259 regulator-max-microvolt = <1100000>;
260 regulator-always-on;
261 op_mode = <3>;
262 };
263
264 ldo8_reg: LDO8 {
265 regulator-name = "P1.0V_LDO_OUT8";
266 regulator-min-microvolt = <1000000>;
267 regulator-max-microvolt = <1000000>;
268 regulator-always-on;
269 op_mode = <3>;
270 };
271
272 ldo10_reg: LDO10 {
273 regulator-name = "P1.8V_LDO_OUT10";
274 regulator-min-microvolt = <1800000>;
275 regulator-max-microvolt = <1800000>;
276 regulator-always-on;
277 op_mode = <3>;
278 };
279
280 ldo11_reg: LDO11 {
281 regulator-name = "P1.8V_LDO_OUT11";
282 regulator-min-microvolt = <1800000>;
283 regulator-max-microvolt = <1800000>;
284 regulator-always-on;
285 op_mode = <0>;
286 };
287
288 ldo12_reg: LDO12 {
289 regulator-name = "P3.0V_LDO_OUT12";
290 regulator-min-microvolt = <3000000>;
291 regulator-max-microvolt = <3000000>;
292 regulator-always-on;
293 op_mode = <3>;
294 };
295
296 ldo13_reg: LDO13 {
297 regulator-name = "P1.8V_LDO_OUT13";
298 regulator-min-microvolt = <1800000>;
299 regulator-max-microvolt = <1800000>;
300 regulator-always-on;
301 op_mode = <0>;
302 };
303
304 ldo14_reg: LDO14 {
305 regulator-name = "P1.8V_LDO_OUT14";
306 regulator-min-microvolt = <1800000>;
307 regulator-max-microvolt = <1800000>;
308 regulator-always-on;
309 op_mode = <3>;
310 };
311
312 ldo15_reg: LDO15 {
313 regulator-name = "P1.0V_LDO_OUT15";
314 regulator-min-microvolt = <1000000>;
315 regulator-max-microvolt = <1000000>;
316 regulator-always-on;
317 op_mode = <3>;
318 };
319
320 ldo16_reg: LDO16 {
321 regulator-name = "P1.8V_LDO_OUT16";
322 regulator-min-microvolt = <1800000>;
323 regulator-max-microvolt = <1800000>;
324 regulator-always-on;
325 op_mode = <3>;
326 };
327
328 ldo17_reg: LDO17 {
329 regulator-name = "P1.2V_LDO_OUT17";
330 regulator-min-microvolt = <1200000>;
331 regulator-max-microvolt = <1200000>;
332 regulator-always-on;
333 op_mode = <0>;
334 };
335
336 ldo25_reg: LDO25 {
337 regulator-name = "vdd_bridge";
338 regulator-min-microvolt = <1200000>;
339 regulator-max-microvolt = <1200000>;
340 regulator-always-on;
341 op_mode = <1>;
342 };
343
344 buck1_reg: BUCK1 {
345 regulator-name = "vdd_mif";
346 regulator-min-microvolt = <950000>;
347 regulator-max-microvolt = <1300000>;
348 regulator-always-on;
349 regulator-boot-on;
350 op_mode = <3>;
351 };
352
353 buck2_reg: BUCK2 {
354 regulator-name = "vdd_arm";
355 regulator-min-microvolt = <850000>;
356 regulator-max-microvolt = <1350000>;
357 regulator-always-on;
358 regulator-boot-on;
359 op_mode = <3>;
360 };
361
362 buck3_reg: BUCK3 {
363 regulator-name = "vdd_int";
364 regulator-min-microvolt = <900000>;
365 regulator-max-microvolt = <1200000>;
366 regulator-always-on;
367 regulator-boot-on;
368 op_mode = <3>;
369 };
370
371 buck4_reg: BUCK4 {
372 regulator-name = "vdd_g3d";
373 regulator-min-microvolt = <850000>;
374 regulator-max-microvolt = <1300000>;
375 regulator-boot-on;
376 op_mode = <3>;
377 };
378
379 buck5_reg: BUCK5 {
380 regulator-name = "P1.8V_BUCK_OUT5";
381 regulator-min-microvolt = <1800000>;
382 regulator-max-microvolt = <1800000>;
383 regulator-always-on;
384 regulator-boot-on;
385 op_mode = <1>;
386 };
387
388 buck6_reg: BUCK6 {
389 regulator-name = "P1.2V_BUCK_OUT6";
390 regulator-min-microvolt = <2050000>;
391 regulator-max-microvolt = <2050000>;
392 regulator-always-on;
393 regulator-boot-on;
394 op_mode = <0>;
395 };
396
397 buck9_reg: BUCK9 {
398 regulator-name = "vdd_ummc";
399 regulator-min-microvolt = <950000>;
400 regulator-max-microvolt = <3000000>;
401 regulator-always-on;
402 regulator-boot-on;
403 op_mode = <3>;
404 };
405 };
406 };
407};
408
Simon Glass67063672016-02-21 21:08:58 -0700[diff] [blame]409&dp {
410 status = "okay";
411 samsung,color-space = <0>;
412 samsung,dynamic-range = <0>;
413 samsung,ycbcr-coeff = <0>;
414 samsung,color-depth = <1>;
415 samsung,link-rate = <0x0a>;
416 samsung,lane-count = <1>;
417 samsung,hpd-gpio = <&gpc3 0 GPIO_ACTIVE_HIGH>;
418
419 ports {
420 port@0 {
421 dp_out: endpoint {
422 remote-endpoint = <&bridge_in>;
423 };
424 };
425 };
426};
427
Simon Glassb1398362015-08-03 08:19:37 -0600[diff] [blame]428&i2c_1 {
429 status = "okay";
430 samsung,i2c-sda-delay = <100>;
431 samsung,i2c-max-bus-freq = <378000>;
432};
433
434&i2c_2 {
435 status = "okay";
436 samsung,i2c-sda-delay = <100>;
437 samsung,i2c-max-bus-freq = <66000>;
438};
439
440&i2c_3 {
441 status = "okay";
442 samsung,i2c-sda-delay = <100>;
443 samsung,i2c-max-bus-freq = <66000>;
444};
445
446&i2c_4 {
447 status = "okay";
448 samsung,i2c-sda-delay = <100>;
449 samsung,i2c-max-bus-freq = <66000>;
450 clock-frequency = <66000>;
451
452 cros_ec: embedded-controller {
453 compatible = "google,cros-ec-i2c";
454 reg = <0x1e>;
455 interrupts = <6 IRQ_TYPE_NONE>;
456 interrupt-parent = <&gpx1>;
457 wakeup-source;
458 u-boot,i2c-offset-len = <0>;
459 ec-interrupt = <&gpx1 6 GPIO_ACTIVE_LOW>;
460 cros_ec_ldo_tunnel: cros-ec-ldo-tunnel {
461 compatible = "google,cros-ec-ldo-tunnel";
462 #address-cells = <1>;
463 #size-cells = <0>;
464 power-regulator {
465 compatible = "ti,tps65090";
466 reg = <0x48>;
467
468 regulators {
469 dcdc1 {
470 ti,enable-ext-control;
471 };
472 dcdc2 {
473 ti,enable-ext-control;
474 };
475 dcdc3 {
476 ti,enable-ext-control;
477 };
478 fet1: fet1 {
479 regulator-name = "vcd_led";
480 ti,overcurrent-wait = <3>;
481 };
482 tps65090_fet2: fet2 {
483 regulator-name = "video_mid";
484 regulator-always-on;
485 ti,overcurrent-wait = <3>;
486 };
487 fet3 {
488 regulator-name = "wwan_r";
489 regulator-always-on;
490 ti,overcurrent-wait = <3>;
491 };
492 fet4 {
493 regulator-name = "sdcard";
494 ti,overcurrent-wait = <3>;
495 };
496 fet5 {
497 regulator-name = "camout";
498 regulator-always-on;
499 ti,overcurrent-wait = <3>;
500 };
501 fet6: fet6 {
502 regulator-name = "lcd_vdd";
503 ti,overcurrent-wait = <3>;
504 };
505 tps65090_fet7: fet7 {
506 regulator-name = "video_mid_1a";
507 regulator-always-on;
508 ti,overcurrent-wait = <3>;
509 };
510 ldo1 {
511 };
512 ldo2 {
513 };
514 };
515 };
516 };
517 };
518};
519
520&i2c_5 {
521 status = "okay";
522 samsung,i2c-sda-delay = <100>;
523 samsung,i2c-max-bus-freq = <66000>;
524};
525
526&i2c_7 {
527 status = "okay";
528 samsung,i2c-sda-delay = <100>;
529 samsung,i2c-max-bus-freq = <66000>;
530
531 ps8622-bridge@8 {
532 compatible = "parade,ps8622";
533 reg = <0x8>;
534 sleep-gpios = <&gpc3 6 GPIO_ACTIVE_LOW>;
535 reset-gpios = <&gpc3 1 GPIO_ACTIVE_LOW>;
536 hotplug-gpios = <&gpc3 0 GPIO_ACTIVE_HIGH>;
537 power-supply = <&ldo6_reg>;
538 parade,regs = /bits/ 8 <
539 0x02 0xa1 0x01 /* HPD low */
540 /*
541 * SW setting: [1:0] SW output 1.2V voltage is
542 * lower to 96%
543 */
544 0x04 0x14 0x01
545 /* RCO SS setting: [5:4] = b01 0.5%, b10 1%, b11 1.5% */
546 0x04 0xe3 0x20
547 0x04 0xe2 0x80 /* [7] RCO SS enable */
548 /*
549 * RPHY Setting: [3:2] CDR tune wait cycle before
550 * measure for fine tune b00: 1us,
551 * 01: 0.5us, 10:2us, 11:4us
552 */
553 0x04 0x8a 0x0c
554 0x04 0x89 0x08 /* [3] RFD always on */
555 /*
556 * CTN lock in/out: 20000ppm/80000ppm. Lock out 2 times
557 */
558 0x04 0x71 0x2d
559 /* 2.7G CDR settings */
560 0x04 0x7d 0x07 /* NOF=40LSB for HBR CDR setting */
561 0x04 0x7b 0x00 /* [1:0] Fmin=+4bands */
562 0x04 0x7a 0xfd /* [7:5] DCO_FTRNG=+-40% */
563 /*
564 * 1.62G CDR settings:
565 * [5:2]NOF=64LSB [1:0]DCO scale is 2/5
566 */
567 0x04 0xc0 0x12
568 0x04 0xc1 0x92 /* Gitune=-37% */
569 0x04 0xc2 0x1c /* Fbstep=100% */
570 0x04 0x32 0x80 /* [7] LOS signal disable */
571 /* RPIO Setting */
572 /* [7:4] LVDS driver bias current 75% (250mV swing) */
573 0x04 0x00 0xb0
574 /* [7:6] Right-bar GPIO output strength is 8mA */
575 0x04 0x15 0x40
576 /* EQ Training State Machine Setting */
577 0x04 0x54 0x10 /* RCO calibration start */
578 /* [4:0] MAX_LANE_COUNT set to one lane */
579 0x01 0x02 0x81
580 /* [4:0] LANE_COUNT_SET set to one lane */
581 0x01 0x21 0x81
582 0x00 0x52 0x20
583 0x00 0xf1 0x03 /* HPD CP toggle enable */
584 0x00 0x62 0x41
585 /* Counter number add 1ms counter delay */
586 0x00 0xf6 0x01
587 /*
588 * [6]PWM function control by DPCD0040f[7], default
589 * is PWM block always works
590 */
591 0x00 0x77 0x06
592 0x00 0x4c 0x04
593 /*
594 * 04h Adjust VTotal tolerance to fix the 30Hz no-
595 * display issue
596 * DPCD00400='h00 Parade OUI = 'h001cf8
597 */
598 0x01 0xc0 0x00
599 0x01 0xc1 0x1c /* DPCD00401='h1c */
600 0x01 0xc2 0xf8 /* DPCD00402='hf8 */
601 /* DPCD403~408 = ASCII code D2SLV5='h4432534c5635 */
602 0x01 0xc3 0x44
603 0x01 0xc4 0x32 /* DPCD404 */
604 0x01 0xc5 0x53 /* DPCD405 */
605 0x01 0xc6 0x4c /* DPCD406 */
606 0x01 0xc7 0x56 /* DPCD407 */
607 0x01 0xc8 0x35 /* DPCD408 */
608 /* DPCD40A Initial Code major revision '01' */
609 0x01 0xca 0x01
610 /* DPCD40B Initial Code minor revision '05' */
611 0x01 0xcb 0x05
612 0x01 0xa5 0xa0 /* DPCD720, Select internal PWM */
613 /*
614 * 0xff for 100% PWM of brightness, 0h for 0% brightness
615 */
616 0x01 0xa7 0x00
617 /*
618 * Set LVDS output as 6bit-VESA mapping, single LVDS
619 * channel
620 */
621 0x01 0xcc 0x13
622 0x02 0xb1 0x20 /* Enable SSC set by register */
623 /* Set SSC enabled and +/-1% central spreading */
624 0x04 0x10 0x16
625 0x04 0x59 0x60 /* MPU Clock source: LC => RCO */
626 0x04 0x54 0x14 /* LC -> RCO */
627 0x02 0xa1 0x91>; /* HPD high */
Simon Glass67063672016-02-21 21:08:58 -0700[diff] [blame]628 ports {
629 port@0 {
630 bridge_out: endpoint {
631 remote-endpoint = <&panel_in>;
632 };
633 };
634
635 port@1 {
636 bridge_in: endpoint {
637 remote-endpoint = <&dp_out>;
638 };
639 };
640 };
Simon Glassb1398362015-08-03 08:19:37 -0600[diff] [blame]641 };
642
643 soundcodec@20 {
644 reg = <0x20>;
645 compatible = "maxim,max98088-codec";
646 };
647};
648
649#include "cros-ec-keyboard.dtsi"