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git01.mediatek.com / filogic / uboot / b27594de22ce92eec3586b1d4b09840e1521e8ce / . / configs / snow_defconfig
blob: 9d14eb84f8ccd72413e22f6248dd2818506677d5 [file] [log] [blame]
Masahiro Yamadad5f8fee2015-03-12 13:24:39 +0900[diff] [blame]1CONFIG_ARM=y
Tom Rini443b5162017-01-12 13:16:02 -0500[diff] [blame]2# CONFIG_SPL_USE_ARCH_MEMCPY is not set
3# CONFIG_SPL_USE_ARCH_MEMSET is not set
Masahiro Yamadad5f8fee2015-03-12 13:24:39 +0900[diff] [blame]4CONFIG_ARCH_EXYNOS=y
Tom Rini07edfae2018-02-03 12:10:38 -0500[diff] [blame]5CONFIG_SYS_TEXT_BASE=0x43E00000
Thomas Abrahama99ad392016-04-23 22:18:12 +0530[diff] [blame]6CONFIG_ARCH_EXYNOS5=y
Masahiro Yamadad5f8fee2015-03-12 13:24:39 +0900[diff] [blame]7CONFIG_TARGET_SNOW=y
Tom Rini9bd09622018-04-07 20:27:54 -0400[diff] [blame]8CONFIG_SPL=y
Siva Durga Prasad Paladugu809438d2016-07-29 15:31:47 +0530[diff] [blame]9CONFIG_IDENT_STRING=" for snow"
Masahiro Yamada8c65b9d2014-09-22 19:59:06 +0900[diff] [blame]10CONFIG_DEFAULT_DEVICE_TREE="exynos5250-snow"
Tom Rini256aa742017-06-19 09:47:40 -0400[diff] [blame]11CONFIG_DEBUG_UART=y
Tom Rini8db91cf2016-11-29 09:14:57 -0500[diff] [blame]12CONFIG_DISTRO_DEFAULTS=y
Simon Glasse3ee2fb2016-02-22 22:55:43 -0700[diff] [blame]13CONFIG_FIT=y
14CONFIG_FIT_BEST_MATCH=y
Simon Glass4458d3b2016-10-17 20:12:35 -0600[diff] [blame]15CONFIG_SILENT_CONSOLE=y
Tom Rini623d67e2018-02-06 12:15:38 -0500[diff] [blame]16# CONFIG_SPL_FRAMEWORK is not set
Bin Meng63c10982015-09-28 05:14:15 -0700[diff] [blame]17CONFIG_SYS_PROMPT="snow # "
Tom Rini78873cd2017-08-14 19:58:53 -0400[diff] [blame]18CONFIG_CMD_GPIO=y
19CONFIG_CMD_I2C=y
Tom Rini1d9ac832016-04-24 17:29:26 -0400[diff] [blame]20CONFIG_CMD_MMC=y
Tom Rini0f2dcb92016-04-22 16:41:25 -0400[diff] [blame]21CONFIG_CMD_SF=y
22CONFIG_CMD_SPI=y
Tom Rini0f2dcb92016-04-22 16:41:25 -0400[diff] [blame]23CONFIG_CMD_USB=y
Joe Hershberger5a9d7f12015-06-22 16:15:30 -0500[diff] [blame]24# CONFIG_CMD_SETEXPR is not set
Tom Rini1d9ac832016-04-24 17:29:26 -0400[diff] [blame]25CONFIG_CMD_CACHE=y
Tom Rini0f2dcb92016-04-22 16:41:25 -0400[diff] [blame]26CONFIG_CMD_TIME=y
Joe Hershbergera274ded2015-05-12 14:46:24 -0500[diff] [blame]27CONFIG_CMD_SOUND=y
Simon Glass2347daa2015-08-19 09:33:42 -0600[diff] [blame]28CONFIG_CMD_PMIC=y
29CONFIG_CMD_REGULATOR=y
Simon Glass8b6216a2015-08-22 18:31:20 -0600[diff] [blame]30CONFIG_CMD_TPM=y
Simon Glass81ab5472015-08-22 18:31:43 -0600[diff] [blame]31CONFIG_CMD_TPM_TEST=y
Tom Rini1d9ac832016-04-24 17:29:26 -0400[diff] [blame]32CONFIG_CMD_EXT4_WRITE=y
Tom Rini5b0b0402017-08-28 07:16:32 -0400[diff] [blame]33CONFIG_ENV_IS_IN_SPI_FLASH=y
Simon Glass2347daa2015-08-19 09:33:42 -0600[diff] [blame]34CONFIG_DM_I2C_COMPAT=y
Simon Glass76fc3ad2015-08-03 08:19:28 -0600[diff] [blame]35CONFIG_I2C_CROS_EC_LDO=y
Simon Glass2347daa2015-08-19 09:33:42 -0600[diff] [blame]36CONFIG_I2C_MUX=y
37CONFIG_I2C_ARB_GPIO_CHALLENGE=y
Bin Meng63c10982015-09-28 05:14:15 -0700[diff] [blame]38CONFIG_CROS_EC_KEYB=y
Bin Meng63c10982015-09-28 05:14:15 -0700[diff] [blame]39CONFIG_CROS_EC=y
40CONFIG_CROS_EC_I2C=y
Masahiro Yamada7942e912017-01-10 13:32:04 +0900[diff] [blame]41CONFIG_MMC_DW=y
Masahiro Yamada7db8c172016-12-07 22:10:28 +0900[diff] [blame]42CONFIG_MMC_SDHCI=y
Masahiro Yamada124f6ce2016-12-07 22:10:29 +0900[diff] [blame]43CONFIG_MMC_SDHCI_S5P=y
Bin Meng63c10982015-09-28 05:14:15 -0700[diff] [blame]44CONFIG_SPI_FLASH=y
Bin Meng27f5b192015-11-25 05:34:54 -0800[diff] [blame]45CONFIG_SPI_FLASH_GIGADEVICE=y
46CONFIG_SPI_FLASH_WINBOND=y
Adam Ford0a044f82017-09-05 15:20:44 -0500[diff] [blame]47CONFIG_NETDEVICES=y
48CONFIG_SMC911X=y
49CONFIG_SMC911X_BASE=0x5000000
Simon Glass2347daa2015-08-19 09:33:42 -0600[diff] [blame]50CONFIG_DM_PMIC=y
51CONFIG_DM_PMIC_MAX77686=y
Simon Glass76fc3ad2015-08-03 08:19:28 -0600[diff] [blame]52CONFIG_PMIC_S5M8767=y
Simon Glass2347daa2015-08-19 09:33:42 -0600[diff] [blame]53CONFIG_PMIC_TPS65090=y
54CONFIG_DM_REGULATOR=y
55CONFIG_DM_REGULATOR_MAX77686=y
Simon Glass76fc3ad2015-08-03 08:19:28 -0600[diff] [blame]56CONFIG_REGULATOR_S5M8767=y
Simon Glass2347daa2015-08-19 09:33:42 -0600[diff] [blame]57CONFIG_REGULATOR_TPS65090=y
Simon Glassa1015ad2016-02-21 21:09:01 -0700[diff] [blame]58CONFIG_DM_PWM=y
59CONFIG_PWM_EXYNOS=y
Bin Meng63c10982015-09-28 05:14:15 -0700[diff] [blame]60CONFIG_DEBUG_UART_S5P=y
61CONFIG_DEBUG_UART_BASE=0x12c30000
62CONFIG_DEBUG_UART_CLOCK=100000000
Simon Glass2347daa2015-08-19 09:33:42 -0600[diff] [blame]63CONFIG_SOUND=y
64CONFIG_I2S=y
65CONFIG_I2S_SAMSUNG=y
66CONFIG_SOUND_MAX98095=y
67CONFIG_SOUND_WM8994=y
Bin Meng72a049d2015-11-25 05:34:53 -0800[diff] [blame]68CONFIG_EXYNOS_SPI=y
Christophe Ricard8759ff82015-10-06 22:54:41 +0200[diff] [blame]69CONFIG_TPM_TIS_INFINEON=y
Simon Glass2347daa2015-08-19 09:33:42 -0600[diff] [blame]70CONFIG_USB=y
71CONFIG_DM_USB=y
Sjoerd Simons4228ea62017-01-10 14:36:17 +0100[diff] [blame]72CONFIG_USB_XHCI_HCD=y
73CONFIG_USB_XHCI_DWC3=y
Tom Rini7716cd62017-05-12 22:33:28 -0400[diff] [blame]74CONFIG_USB_EHCI_HCD=y
Tom Rini6e9cb112016-09-08 16:31:26 -0400[diff] [blame]75CONFIG_USB_STORAGE=y
Chris Packham547cf412017-08-28 20:50:45 +1200[diff] [blame]76CONFIG_USB_HOST_ETHER=y
Chris Packhamb110e112017-08-28 20:50:46 +1200[diff] [blame]77CONFIG_USB_ETHER_ASIX88179=y
Simon Glassa1015ad2016-02-21 21:09:01 -0700[diff] [blame]78CONFIG_DM_VIDEO=y
Tom Rini9834b902017-03-13 13:48:42 -0400[diff] [blame]79CONFIG_VIDCONSOLE_AS_LCD=y
Simon Glassa1015ad2016-02-21 21:09:01 -0700[diff] [blame]80CONFIG_DISPLAY=y
Bin Meng63c10982015-09-28 05:14:15 -0700[diff] [blame]81CONFIG_VIDEO_BRIDGE=y
82CONFIG_VIDEO_BRIDGE_PARADE_PS862X=y
83CONFIG_VIDEO_BRIDGE_NXP_PTN3460=y
Simon Glass169bb3b2016-10-17 20:12:56 -0600[diff] [blame]84CONFIG_LCD=y
Simon Glass8b6216a2015-08-22 18:31:20 -0600[diff] [blame]85CONFIG_TPM=y
Simon Glass2347daa2015-08-19 09:33:42 -0600[diff] [blame]86CONFIG_ERRNO_STR=y