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Daniel Hellstrom5b059f72008-03-26 23:38:48 +01001/* Configuration header file for Gaisler GR-CPCI-AX2000
2 * AX board. Note that since the AX is removable the configuration
3 * for this board must be edited below.
4 *
5 * (C) Copyright 2003-2005
6 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
7 *
8 * (C) Copyright 2008
9 * Daniel Hellstrom, Gaisler Research, daniel@gaisler.com.
10 *
Wolfgang Denkbd8ec7e2013-10-07 13:07:26 +020011 * SPDX-License-Identifier: GPL-2.0+
Daniel Hellstrom5b059f72008-03-26 23:38:48 +010012 */
13
14#ifndef __CONFIG_H__
15#define __CONFIG_H__
16
Francois Retief703d0242015-10-28 16:49:02 +020017#define CONFIG_DISPLAY_BOARDINFO
Francois Retiefb131cc52015-10-29 00:02:48 +020018
Daniel Hellstrom5b059f72008-03-26 23:38:48 +010019/*
20 * High Level Configuration Options
21 * (easy to change)
22 */
23
Daniel Hellstrom5b059f72008-03-26 23:38:48 +010024#define CONFIG_CPCI_AX2000 1 /* ... on GR-CPCI-AX2000 board */
25
26#define CONFIG_LEON_RAM_SRAM 1
27#define CONFIG_LEON_RAM_SDRAM 2
28#define CONFIG_LEON_RAM_SDRAM_NOSRAM 3
29
30/* Select Memory to run from
31 *
32 * SRAM - UBoot is run in SRAM, SRAM-0x40000000, SDRAM-0x60000000
33 * SDRAM - UBoot is run in SDRAM, SRAM-0x40000000 and SDRAM-0x60000000
34 * SDRAM_NOSRAM - UBoot is run in SDRAM, SRAM not available, SDRAM at 0x40000000
35 *
36 * Note, if Linux is to be used, SDRAM or SDRAM_NOSRAM is required since
37 * it doesn't fit into the 4Mb SRAM.
38 *
39 * SRAM is default since it will work for all systems, however will not
40 * be able to boot linux.
41 */
42#define CONFIG_LEON_RAM_SELECT CONFIG_LEON_RAM_SRAM
43
44/* CPU / AMBA BUS configuration */
Wolfgang Denka1be4762008-05-20 16:00:29 +020045#define CONFIG_SYS_CLK_FREQ 20000000 /* 20MHz */
Daniel Hellstrom5b059f72008-03-26 23:38:48 +010046
Daniel Hellstrom5b059f72008-03-26 23:38:48 +010047/*
48 * Serial console configuration
49 */
50#define CONFIG_BAUDRATE 38400 /* ... at 38400 bps */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020051#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, 230400 }
Daniel Hellstrom5b059f72008-03-26 23:38:48 +010052
53/* Partitions */
54#define CONFIG_DOS_PARTITION
55#define CONFIG_MAC_PARTITION
56#define CONFIG_ISO_PARTITION
57
58/*
59 * Supported commands
60 */
Daniel Hellstrom5b059f72008-03-26 23:38:48 +010061#define CONFIG_CMD_REGINFO
Daniel Hellstrom5b059f72008-03-26 23:38:48 +010062#define CONFIG_CMD_DIAG
63#define CONFIG_CMD_IRQ
64
65/*
66 * Autobooting
67 */
Daniel Hellstrom5b059f72008-03-26 23:38:48 +010068
69#define CONFIG_PREBOOT "echo;" \
70 "echo Type \"run flash_nfs\" to mount root filesystem over NFS;" \
71 "echo"
72
73#undef CONFIG_BOOTARGS
74
75#define CONFIG_EXTRA_ENV_SETTINGS_BASE \
76 "netdev=eth0\0" \
77 "nfsargs=setenv bootargs console=ttyS0,38400 root=/dev/nfs rw " \
78 "nfsroot=${serverip}:${rootpath}\0" \
79 "ramargs=setenv bootargs console=ttyS0,${baudrate} root=/dev/ram rw\0" \
80 "addip=setenv bootargs ${bootargs} " \
81 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \
82 ":${hostname}:${netdev}:off panic=1\0" \
83 "flash_nfs=run nfsargs addip;" \
84 "bootm ${kernel_addr}\0" \
85 "flash_self=run ramargs addip;" \
86 "bootm ${kernel_addr} ${ramdisk_addr}\0" \
Mike Frysingerc3c6bf12011-10-12 19:47:51 +000087 "getkernel=tftpboot $(scratch) $(bootfile)\0" \
Daniel Hellstrom5b059f72008-03-26 23:38:48 +010088 "bootargs=console=ttyS0,38400 root=/dev/nfs rw nfsroot=192.168.0.20:/export/rootfs ip=192.168.0.206:192.168.0.20:192.168.0.1:255.255.255.0:ax2000:eth0\0"
89
90#if CONFIG_LEON_RAM_SELECT == CONFIG_LEON_RAM_SRAM
91#define CONFIG_EXTRA_ENV_SETTINGS_SELECT \
92 "net_nfs=tftp 40000000 ${bootfile};run nfsargs addip;bootm\0" \
93 "scratch=40200000\0" \
94 ""
95#elif CONFIG_LEON_RAM_SELECT == CONFIG_LEON_RAM_SDRAM
96#define CONFIG_EXTRA_ENV_SETTINGS_SELECT \
97 "net_nfs=tftp 60000000 ${bootfile};run nfsargs addip;bootm\0" \
98 "scratch=60800000\0" \
99 ""
100#else
101/* More than 4Mb is assumed when running from SDRAM */
102#define CONFIG_EXTRA_ENV_SETTINGS_SELECT \
103 "net_nfs=tftp 40000000 ${bootfile};run nfsargs addip;bootm\0" \
104 "scratch=40800000\0" \
105 ""
106#endif
107
108#define CONFIG_EXTRA_ENV_SETTINGS CONFIG_EXTRA_ENV_SETTINGS_BASE CONFIG_EXTRA_ENV_SETTINGS_SELECT
109
110#define CONFIG_NETMASK 255.255.255.0
111#define CONFIG_GATEWAYIP 192.168.0.1
112#define CONFIG_SERVERIP 192.168.0.20
113#define CONFIG_IPADDR 192.168.0.206
Joe Hershberger257ff782011-10-13 13:03:47 +0000114#define CONFIG_ROOTPATH "/export/rootfs"
Daniel Hellstrom5b059f72008-03-26 23:38:48 +0100115#define CONFIG_HOSTNAME ax2000
Joe Hershbergere4da2482011-10-13 13:03:48 +0000116#define CONFIG_BOOTFILE "/uImage"
Daniel Hellstrom5b059f72008-03-26 23:38:48 +0100117
118#define CONFIG_BOOTCOMMAND "run flash_self"
119
120/* Memory MAP
121 *
122 * Flash:
123 * |--------------------------------|
124 * | 0x00000000 Text & Data & BSS | *
125 * | for Monitor | *
126 * | ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~| *
127 * | UNUSED / Growth | * 256kb
128 * |--------------------------------|
129 * | 0x00050000 Base custom area | *
130 * | kernel / FS | *
131 * | | * Rest of Flash
132 * |~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~|
133 * | END-0x00008000 Environment | * 32kb
134 * |--------------------------------|
135 *
136 *
137 *
138 * Main Memory (4Mb SRAM or XMb SDRAM):
139 * |--------------------------------|
140 * | UNUSED / scratch area |
141 * | |
142 * | |
143 * | |
144 * | |
145 * |--------------------------------|
146 * | Monitor .Text / .DATA / .BSS | * 256kb
147 * | Relocated! | *
148 * |--------------------------------|
149 * | Monitor Malloc | * 128kb (contains relocated environment)
150 * |--------------------------------|
151 * | Monitor/kernel STACK | * 64kb
152 * |--------------------------------|
153 * | Page Table for MMU systems | * 2k
154 * |--------------------------------|
155 * | PROM Code accessed from Linux | * 6kb-128b
156 * |--------------------------------|
157 * | Global data (avail from kernel)| * 128b
158 * |--------------------------------|
159 *
160 */
161
162/*
163 * Flash configuration (8,16 or 32 MB)
164 * TEXT base always at 0xFFF00000
165 * ENV_ADDR always at 0xFFF40000
166 * FLASH_BASE at 0xFC000000 for 64 MB
167 * 0xFE000000 for 32 MB
168 * 0xFF000000 for 16 MB
169 * 0xFF800000 for 8 MB
170 */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200171/*#define CONFIG_SYS_NO_FLASH 1*/
172#define CONFIG_SYS_FLASH_BASE 0x00000000
173#define CONFIG_SYS_FLASH_SIZE 0x00800000
Daniel Hellstrom5b059f72008-03-26 23:38:48 +0100174
175#define PHYS_FLASH_SECT_SIZE 0x00020000 /* 128 KB sectors */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200176#define CONFIG_SYS_MAX_FLASH_SECT 64 /* max num of sects on one chip */
177#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max num of memory banks */
Daniel Hellstrom5b059f72008-03-26 23:38:48 +0100178
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200179#define CONFIG_SYS_FLASH_ERASE_TOUT 240000 /* Flash Erase Timeout (in ms) */
180#define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (in ms) */
181#define CONFIG_SYS_FLASH_LOCK_TOUT 5 /* Timeout for Flash Set Lock Bit (in ms) */
182#define CONFIG_SYS_FLASH_UNLOCK_TOUT 10000 /* Timeout for Flash Clear Lock Bits (in ms) */
183#define CONFIG_SYS_FLASH_PROTECTION /* "Real" (hardware) sectors protection */
Daniel Hellstrom5b059f72008-03-26 23:38:48 +0100184
185/*** CFI CONFIG ***/
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200186#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_8BIT
Jean-Christophe PLAGNIOL-VILLARD8d94c232008-08-13 01:40:42 +0200187#define CONFIG_FLASH_CFI_DRIVER
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200188#define CONFIG_SYS_FLASH_CFI
Daniel Hellstrom5b059f72008-03-26 23:38:48 +0100189/* Bypass cache when reading regs from flash memory */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200190#define CONFIG_SYS_FLASH_CFI_BYPASS_READ
Daniel Hellstrom5b059f72008-03-26 23:38:48 +0100191/* Buffered writes (32byte/go) instead of single accesses */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200192#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE
Daniel Hellstrom5b059f72008-03-26 23:38:48 +0100193
194/*
195 * Environment settings
196 */
Jean-Christophe PLAGNIOL-VILLARD68a87562008-09-10 22:48:00 +0200197/*#define CONFIG_ENV_IS_NOWHERE 1*/
Jean-Christophe PLAGNIOL-VILLARD53db4cd2008-09-10 22:48:04 +0200198#define CONFIG_ENV_IS_IN_FLASH 1
Jean-Christophe PLAGNIOL-VILLARD7e1cda62008-09-10 22:48:06 +0200199/* CONFIG_ENV_ADDR need to be at sector boundary */
200#define CONFIG_ENV_SIZE 0x8000
201#define CONFIG_ENV_SECT_SIZE 0x20000
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200202#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE+CONFIG_SYS_FLASH_SIZE-CONFIG_ENV_SECT_SIZE)
Daniel Hellstrom5b059f72008-03-26 23:38:48 +0100203#define CONFIG_ENV_OVERWRITE 1
204
205/*
206 * Memory map
207 *
208 * Always 4Mb SRAM available
209 * SDRAM module may be available on 0x60000000, SDRAM
210 * is configured as if a 128Mb SDRAM module is available.
211 */
212
213#if CONFIG_LEON_RAM_SELECT == CONFIG_LEON_RAM_SDRAM_NOSRAM
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200214#define CONFIG_SYS_SDRAM_BASE 0x40000000
Daniel Hellstrom5b059f72008-03-26 23:38:48 +0100215#else
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200216#define CONFIG_SYS_SDRAM_BASE 0x60000000
Daniel Hellstrom5b059f72008-03-26 23:38:48 +0100217#endif
218
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200219#define CONFIG_SYS_SDRAM_SIZE 0x08000000
220#define CONFIG_SYS_SDRAM_END (CONFIG_SYS_SDRAM_BASE+CONFIG_SYS_SDRAM_SIZE)
Daniel Hellstrom5b059f72008-03-26 23:38:48 +0100221
222/* 4Mb SRAM available */
223#if CONFIG_LEON_RAM_SELECT != CONFIG_LEON_RAM_SDRAM_NOSRAM
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200224#define CONFIG_SYS_SRAM_BASE 0x40000000
225#define CONFIG_SYS_SRAM_SIZE 0x400000
226#define CONFIG_SYS_SRAM_END (CONFIG_SYS_SRAM_BASE+CONFIG_SYS_SRAM_SIZE)
Daniel Hellstrom5b059f72008-03-26 23:38:48 +0100227#endif
228
229/* Select RAM used to run U-BOOT from... */
230#if CONFIG_LEON_RAM_SELECT == CONFIG_LEON_RAM_SRAM
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200231#define CONFIG_SYS_RAM_BASE CONFIG_SYS_SRAM_BASE
232#define CONFIG_SYS_RAM_SIZE CONFIG_SYS_SRAM_SIZE
233#define CONFIG_SYS_RAM_END CONFIG_SYS_SRAM_END
Daniel Hellstrom5b059f72008-03-26 23:38:48 +0100234#else
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200235#define CONFIG_SYS_RAM_BASE CONFIG_SYS_SDRAM_BASE
236#define CONFIG_SYS_RAM_SIZE CONFIG_SYS_SDRAM_SIZE
237#define CONFIG_SYS_RAM_END CONFIG_SYS_SDRAM_END
Daniel Hellstrom5b059f72008-03-26 23:38:48 +0100238#endif
239
Wolfgang Denk0191e472010-10-26 14:34:52 +0200240#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_RAM_END - GENERATED_GBL_DATA_SIZE)
Daniel Hellstrom5b059f72008-03-26 23:38:48 +0100241
Wolfgang Denk0191e472010-10-26 14:34:52 +0200242#define CONFIG_SYS_PROM_SIZE (8192-GENERATED_GBL_DATA_SIZE)
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200243#define CONFIG_SYS_PROM_OFFSET (CONFIG_SYS_GBL_DATA_OFFSET-CONFIG_SYS_PROM_SIZE)
Daniel Hellstrom5b059f72008-03-26 23:38:48 +0100244
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200245#define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_PROM_OFFSET-32)
246#define CONFIG_SYS_STACK_SIZE (0x10000-32)
Daniel Hellstrom5b059f72008-03-26 23:38:48 +0100247
Wolfgang Denk0708bc62010-10-07 21:51:12 +0200248#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200249#if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
250# define CONFIG_SYS_RAMBOOT 1
Daniel Hellstrom5b059f72008-03-26 23:38:48 +0100251#endif
252
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200253#define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */
254#define CONFIG_SYS_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc() */
255#define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
Daniel Hellstrom5b059f72008-03-26 23:38:48 +0100256
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200257#define CONFIG_SYS_MALLOC_END (CONFIG_SYS_INIT_SP_OFFSET-CONFIG_SYS_STACK_SIZE)
258#define CONFIG_SYS_MALLOC_BASE (CONFIG_SYS_MALLOC_END-CONFIG_SYS_MALLOC_LEN)
Daniel Hellstrom5b059f72008-03-26 23:38:48 +0100259
260/* relocated monitor area */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200261#define CONFIG_SYS_RELOC_MONITOR_MAX_END CONFIG_SYS_MALLOC_BASE
262#define CONFIG_SYS_RELOC_MONITOR_BASE (CONFIG_SYS_RELOC_MONITOR_MAX_END-CONFIG_SYS_MONITOR_LEN)
Daniel Hellstrom5b059f72008-03-26 23:38:48 +0100263
264/* make un relocated address from relocated address */
Wolfgang Denk0708bc62010-10-07 21:51:12 +0200265#define UN_RELOC(address) (address-(CONFIG_SYS_RELOC_MONITOR_BASE-CONFIG_SYS_TEXT_BASE))
Daniel Hellstrom5b059f72008-03-26 23:38:48 +0100266
267/*
268 * Ethernet configuration uses on board SMC91C111
269 */
Ben Warren0fd6aae2009-10-04 22:37:03 -0700270#define CONFIG_SMC91111 1
Daniel Hellstrom5b059f72008-03-26 23:38:48 +0100271#define CONFIG_SMC91111_BASE 0x20000300 /* chip select 3 */
272#define CONFIG_SMC_USE_32_BIT 1 /* 32 bit bus */
273#undef CONFIG_SMC_91111_EXT_PHY /* we use internal phy */
274/*#define CONFIG_SHOW_ACTIVITY*/
275#define CONFIG_NET_RETRY_COUNT 10 /* # of retries */
276
Daniel Hellstrom5b059f72008-03-26 23:38:48 +0100277#define CONFIG_PHY_ADDR 0x00
278
279/*
280 * Miscellaneous configurable options
281 */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200282#define CONFIG_SYS_LONGHELP /* undef to save memory */
Daniel Hellstrom5b059f72008-03-26 23:38:48 +0100283#if defined(CONFIG_CMD_KGDB)
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200284#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
Daniel Hellstrom5b059f72008-03-26 23:38:48 +0100285#else
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200286#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
Daniel Hellstrom5b059f72008-03-26 23:38:48 +0100287#endif
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200288#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
289#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
290#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
Daniel Hellstrom5b059f72008-03-26 23:38:48 +0100291
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200292#define CONFIG_SYS_MEMTEST_START 0x00100000 /* memtest works on */
293#define CONFIG_SYS_MEMTEST_END 0x00f00000 /* 1 ... 15 MB in DRAM */
Daniel Hellstrom5b059f72008-03-26 23:38:48 +0100294
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200295#define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
Daniel Hellstrom5b059f72008-03-26 23:38:48 +0100296
Daniel Hellstrom5b059f72008-03-26 23:38:48 +0100297/*
298 * Various low-level settings
299 */
300
301/*-----------------------------------------------------------------------
302 * USB stuff
303 *-----------------------------------------------------------------------
304 */
305#define CONFIG_USB_CLOCK 0x0001BBBB
306#define CONFIG_USB_CONFIG 0x00005000
307
308/***** Gaisler GRLIB IP-Cores Config ********/
309
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200310#define CONFIG_SYS_GRLIB_SDRAM 0
Daniel Hellstrom5b059f72008-03-26 23:38:48 +0100311
Daniel Hellstroma7da6a02010-01-25 09:56:08 +0100312/* No SDRAM Configuration */
313#undef CONFIG_SYS_GRLIB_GAISLER_SDCTRL1
314
Daniel Hellstrom5b059f72008-03-26 23:38:48 +0100315/* See, GRLIB Docs (grip.pdf) on how to set up
316 * These the memory controller registers.
317 */
Daniel Hellstroma7da6a02010-01-25 09:56:08 +0100318#define CONFIG_SYS_GRLIB_ESA_MCTRL1
319#define CONFIG_SYS_GRLIB_ESA_MCTRL1_CFG1 (0x10f800ff | (1<<11))
Daniel Hellstrom5b059f72008-03-26 23:38:48 +0100320#if CONFIG_LEON_RAM_SELECT == CONFIG_LEON_RAM_SDRAM_NOSRAM
Daniel Hellstroma7da6a02010-01-25 09:56:08 +0100321#define CONFIG_SYS_GRLIB_ESA_MCTRL1_CFG2 0x82206000
Daniel Hellstrom5b059f72008-03-26 23:38:48 +0100322#else
Daniel Hellstroma7da6a02010-01-25 09:56:08 +0100323#define CONFIG_SYS_GRLIB_ESA_MCTRL1_CFG2 0x82205260
Daniel Hellstrom5b059f72008-03-26 23:38:48 +0100324#endif
Daniel Hellstroma7da6a02010-01-25 09:56:08 +0100325#define CONFIG_SYS_GRLIB_ESA_MCTRL1_CFG3 0x0809a000
Daniel Hellstrom5b059f72008-03-26 23:38:48 +0100326
Daniel Hellstroma7da6a02010-01-25 09:56:08 +0100327/* GRLIB FT-MCTRL configuration */
328#define CONFIG_SYS_GRLIB_GAISLER_FTMCTRL1
329#define CONFIG_SYS_GRLIB_GAISLER_FTMCTRL1_CFG1 (0x10f800ff | (1<<11))
Daniel Hellstrom5b059f72008-03-26 23:38:48 +0100330#if CONFIG_LEON_RAM_SELECT == CONFIG_LEON_RAM_SDRAM_NOSRAM
Daniel Hellstroma7da6a02010-01-25 09:56:08 +0100331#define CONFIG_SYS_GRLIB_GAISLER_FTMCTRL1_CFG2 0x82206000
Daniel Hellstrom5b059f72008-03-26 23:38:48 +0100332#else
Daniel Hellstroma7da6a02010-01-25 09:56:08 +0100333#define CONFIG_SYS_GRLIB_GAISLER_FTMCTRL1_CFG2 0x82205260
Daniel Hellstrom5b059f72008-03-26 23:38:48 +0100334#endif
Daniel Hellstroma7da6a02010-01-25 09:56:08 +0100335#define CONFIG_SYS_GRLIB_GAISLER_FTMCTRL1_CFG3 0x0809a000
Daniel Hellstrom5b059f72008-03-26 23:38:48 +0100336
337/* no DDR controller */
Daniel Hellstroma7da6a02010-01-25 09:56:08 +0100338#undef CONFIG_SYS_GRLIB_GAISLER_DDRSPA1
Daniel Hellstrom5b059f72008-03-26 23:38:48 +0100339
340/* no DDR2 Controller */
Daniel Hellstroma7da6a02010-01-25 09:56:08 +0100341#undef CONFIG_SYS_GRLIB_GAISLER_DDR2SPA1
Daniel Hellstrom5b059f72008-03-26 23:38:48 +0100342
Daniel Hellstrom5b059f72008-03-26 23:38:48 +0100343/* Identification string */
Francois Retief703d0242015-10-28 16:49:02 +0200344#define CONFIG_IDENT_STRING " Gaisler LEON3 GR-CPCI-AX2000"
Daniel Hellstrom5b059f72008-03-26 23:38:48 +0100345
346/* default kernel command line */
347#define CONFIG_DEFAULT_KERNEL_COMMAND_LINE "console=ttyS0,38400\0\0"
348
349#endif /* __CONFIG_H */