blob: 55ef612f51fb3c2d78a1f26ea4f691c1acec0c34 [file] [log] [blame]
Stefano Babic4c8d4122016-06-06 11:19:42 +02001/*
2 * Copyright (C) Stefano Babic <sbabic@denx.de>
3 *
4 * Configuration settings for the E+L i.MX6Q DO82 board.
5 *
6 * SPDX-License-Identifier: GPL-2.0+
7 */
8
9#ifndef __EL6Q_COMMON_CONFIG_H
10#define __EL6Q_COMMON_CONFIG_H
11
12#define CONFIG_BOARD_NAME EL6Q
13
14#include <config_distro_defaults.h>
15#include "mx6_common.h"
16
17#define CONFIG_IMX_THERMAL
18
19/* Size of malloc() pool */
20#define CONFIG_SYS_MALLOC_LEN (10 * SZ_1M)
21
22#define CONFIG_BOARD_EARLY_INIT_F
23#define CONFIG_BOARD_LATE_INIT
24
25#define CONFIG_MXC_UART
26
27#ifdef CONFIG_SPL
28#define CONFIG_SPL_LIBCOMMON_SUPPORT
29#define CONFIG_SPL_MMC_SUPPORT
30#define CONFIG_SPL_SPI_SUPPORT
31#define CONFIG_SPL_SPI_FLASH_SUPPORT
32#define CONFIG_SYS_SPI_U_BOOT_OFFS (64 * 1024)
33#define CONFIG_SPL_SPI_LOAD
34#include "imx6_spl.h"
35#endif
36
37/* MMC Configs */
38#define CONFIG_SYS_FSL_ESDHC_ADDR 0
39#define CONFIG_SYS_FSL_USDHC_NUM 2
40
41/* I2C config */
42#define CONFIG_SYS_I2C
43#define CONFIG_SYS_I2C_MXC
44#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
45#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
46#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
47#define CONFIG_SYS_I2C_SPEED 100000
48
49/* PMIC */
50#define CONFIG_POWER
51#define CONFIG_POWER_I2C
52#define CONFIG_POWER_PFUZE100
53#define CONFIG_POWER_PFUZE100_I2C_ADDR 0x08
54
55/* Commands */
56#define CONFIG_MXC_SPI
57#define CONFIG_SF_DEFAULT_BUS 3
58#define CONFIG_SF_DEFAULT_CS 0
59#define CONFIG_SF_DEFAULT_SPEED 20000000
60#define CONFIG_SF_DEFAULT_MODE SPI_MODE_0
61
62/* allow to overwrite serial and ethaddr */
63#define CONFIG_ENV_OVERWRITE
64#define CONFIG_MXC_UART_BASE UART2_BASE
65#define CONFIG_BAUDRATE 115200
66
67/* Command definition */
68
69#define CONFIG_CMD_BMODE
70#define CONFIG_CMD_BOOTZ
71#undef CONFIG_CMD_IMLS
72
73#define CONFIG_BOARD_NAME EL6Q
74
75#define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
76#define CONFIG_EXTRA_ENV_SETTINGS \
77 "board="__stringify(CONFIG_BOARD_NAME)"\0" \
78 "cma_size="__stringify(EL6Q_CMA_SIZE)"\0" \
79 "chp_size="__stringify(EL6Q_COHERENT_POOL_SIZE)"\0" \
80 "console=" CONFIG_CONSOLE_DEV "\0" \
81 "fdtfile=undefined\0" \
82 "fdt_high=0xffffffff\0" \
83 "fdt_addr_r=0x18000000\0" \
84 "fdt_addr=0x18000000\0" \
85 "findfdt=setenv fdtfile " CONFIG_DEFAULT_FDT_FILE "\0" \
86 "kernel_addr_r=" __stringify(CONFIG_LOADADDR) "\0" \
87 "scriptaddr=" __stringify(CONFIG_LOADADDR) "\0" \
88 "pxefile_addr_r=" __stringify(CONFIG_LOADADDR) "\0" \
89 BOOTENV
90
91#define BOOT_TARGET_DEVICES(func) \
92 func(MMC, mmc, 0) \
93 func(MMC, mmc, 1) \
94 func(PXE, PXE, na) \
95 func(DHCP, dhcp, na)
96
97#define CONFIG_BOOTCOMMAND \
98 "run findfdt; " \
99 "run distro_bootcmd"
100
101#include <config_distro_bootcmd.h>
102
103#define CONFIG_ARP_TIMEOUT 200UL
104
105#define CONFIG_CMD_MEMTEST
106
107#define CONFIG_SYS_MEMTEST_START 0x10000000
108#define CONFIG_SYS_MEMTEST_END 0x10800000
109#define CONFIG_SYS_MEMTEST_SCRATCH 0x10800000
110
111#define CONFIG_STACKSIZE (128 * 1024)
112
113/* Physical Memory Map */
114#define CONFIG_NR_DRAM_BANKS 1
115#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
116
117#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
118#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
119#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
120
121#define CONFIG_SYS_INIT_SP_OFFSET \
122 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
123#define CONFIG_SYS_INIT_SP_ADDR \
124 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
125
126/* FLASH and environment organization */
127#define CONFIG_SYS_NO_FLASH
128
129#define CONFIG_ENV_SIZE (8 * 1024)
130
131#define CONFIG_ENV_IS_IN_MMC
132
133#if defined(CONFIG_ENV_IS_IN_MMC)
134#define CONFIG_SYS_MMC_ENV_DEV 1
135#define CONFIG_SYS_MMC_ENV_PART 2
136#define CONFIG_ENV_OFFSET 0x0
137#endif
138
139#endif /* __EL6Q_COMMON_CONFIG_H */