Tom Rini | 10e4779 | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0+ */ |
Valentin Longchamp | c98bf29 | 2013-10-18 11:47:24 +0200 | [diff] [blame] | 2 | /* |
| 3 | * (C) Copyright 2013 Keymile AG |
| 4 | * Valentin Longchamp <valentin.longchamp@keymile.com> |
Valentin Longchamp | c98bf29 | 2013-10-18 11:47:24 +0200 | [diff] [blame] | 5 | */ |
| 6 | |
| 7 | #ifndef __CONFIG_H |
| 8 | #define __CONFIG_H |
| 9 | |
| 10 | /* KMLION1 */ |
| 11 | #if defined(CONFIG_KMLION1) |
Mario Six | 790d844 | 2018-03-28 14:38:20 +0200 | [diff] [blame] | 12 | #define CONFIG_HOSTNAME "kmlion1" |
Valentin Longchamp | c98bf29 | 2013-10-18 11:47:24 +0200 | [diff] [blame] | 13 | #define CONFIG_KM_BOARD_NAME "kmlion1" |
| 14 | |
Valentin Longchamp | 4d0213a0 | 2014-01-27 11:49:08 +0100 | [diff] [blame] | 15 | /* KMCOGE4 */ |
| 16 | #elif defined(CONFIG_KMCOGE4) |
Mario Six | 790d844 | 2018-03-28 14:38:20 +0200 | [diff] [blame] | 17 | #define CONFIG_HOSTNAME "kmcoge4" |
Valentin Longchamp | 4d0213a0 | 2014-01-27 11:49:08 +0100 | [diff] [blame] | 18 | #define CONFIG_KM_BOARD_NAME "kmcoge4" |
| 19 | |
Valentin Longchamp | c98bf29 | 2013-10-18 11:47:24 +0200 | [diff] [blame] | 20 | #else |
| 21 | #error ("Board not supported") |
| 22 | #endif |
| 23 | |
| 24 | #define CONFIG_KMP204X |
| 25 | |
| 26 | #include "km/kmp204x-common.h" |
| 27 | |
| 28 | #if defined(CONFIG_KMLION1) |
| 29 | /* App1 Local bus */ |
| 30 | #define CONFIG_SYS_LBAPP1_BASE 0xD0000000 |
| 31 | #define CONFIG_SYS_LBAPP1_BASE_PHYS 0xFD0000000ull |
| 32 | |
| 33 | #define CONFIG_SYS_LBAPP1_BR_PRELIM (BR_PHYS_ADDR(CONFIG_SYS_LBAPP1_BASE_PHYS) \ |
| 34 | | BR_PS_8 /* Port Size 8 bits */ \ |
| 35 | | BR_DECC_OFF /* no error corr */ \ |
| 36 | | BR_MS_GPCM /* MSEL = GPCM */ \ |
| 37 | | BR_V) /* valid */ |
| 38 | |
| 39 | #define CONFIG_SYS_LBAPP1_OR_PRELIM (OR_AM_256MB /* length 256MB */ \ |
| 40 | | OR_GPCM_ACS_DIV2 /* LCS 1/2 clk after */ \ |
| 41 | | OR_GPCM_CSNT /* LCS 1/4 clk before */ \ |
| 42 | | OR_GPCM_SCY_2 /* 2 clk wait cycles */ \ |
| 43 | | OR_GPCM_TRLX /* relaxed tmgs */ \ |
| 44 | | OR_GPCM_EAD) /* extra bus clk cycles */ |
| 45 | /* Local bus app1 Base Address */ |
| 46 | #define CONFIG_SYS_BR2_PRELIM CONFIG_SYS_LBAPP1_BR_PRELIM |
| 47 | /* Local bus app1 Options */ |
| 48 | #define CONFIG_SYS_OR2_PRELIM CONFIG_SYS_LBAPP1_OR_PRELIM |
Valentin Longchamp | 4d0213a0 | 2014-01-27 11:49:08 +0100 | [diff] [blame] | 49 | #endif |
Valentin Longchamp | c98bf29 | 2013-10-18 11:47:24 +0200 | [diff] [blame] | 50 | |
| 51 | /* App2 Local bus */ |
| 52 | #define CONFIG_SYS_LBAPP2_BASE 0xE0000000 |
| 53 | #define CONFIG_SYS_LBAPP2_BASE_PHYS 0xFE0000000ull |
| 54 | |
| 55 | #define CONFIG_SYS_LBAPP2_BR_PRELIM (BR_PHYS_ADDR(CONFIG_SYS_LBAPP2_BASE_PHYS) \ |
| 56 | | BR_PS_8 /* Port Size 8 bits */ \ |
| 57 | | BR_DECC_OFF /* no error corr */ \ |
| 58 | | BR_MS_GPCM /* MSEL = GPCM */ \ |
| 59 | | BR_V) /* valid */ |
| 60 | |
| 61 | #define CONFIG_SYS_LBAPP2_OR_PRELIM (OR_AM_256MB /* length 256MB */ \ |
| 62 | | OR_GPCM_ACS_DIV2 /* LCS 1/2 clk after */ \ |
| 63 | | OR_GPCM_CSNT /* LCS 1/4 clk before */ \ |
| 64 | | OR_GPCM_SCY_2 /* 2 clk wait cycles */ \ |
| 65 | | OR_GPCM_TRLX /* relaxed tmgs */ \ |
| 66 | | OR_GPCM_EAD) /* extra bus clk cycles */ |
| 67 | /* Local bus app2 Base Address */ |
| 68 | #define CONFIG_SYS_BR3_PRELIM CONFIG_SYS_LBAPP2_BR_PRELIM |
| 69 | /* Local bus app2 Options */ |
| 70 | #define CONFIG_SYS_OR3_PRELIM CONFIG_SYS_LBAPP2_OR_PRELIM |
Valentin Longchamp | c98bf29 | 2013-10-18 11:47:24 +0200 | [diff] [blame] | 71 | |
| 72 | #endif /* __CONFIG_H */ |