blob: 71697e101f8c7f0139ba78018d275723e3b5b2a7 [file] [log] [blame]
Yusuke Godac77aa172008-03-05 14:30:02 +09001/*
2 * SH4 PCI Controller (PCIC) for U-Boot.
3 * (C) Dustin McIntire (dustin@sensoria.com)
Nobuhiro Iwamatsu7d180fd2008-03-24 01:53:01 +09004 * (C) 2007,2008 Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Yusuke Godac77aa172008-03-05 14:30:02 +09005 * (C) 2008 Yusuke Goda <goda.yusuke@renesas.com>
6 *
7 * u-boot/include/asm-sh/pci.h
8 *
Wolfgang Denkd79de1d2013-07-08 09:37:19 +02009 * SPDX-License-Identifier: GPL-2.0+
Yusuke Godac77aa172008-03-05 14:30:02 +090010 */
11#ifndef _ASM_PCI_H_
12#define _ASM_PCI_H_
13
14#include <pci.h>
Nobuhiro Iwamatsu7d180fd2008-03-24 01:53:01 +090015#if defined(CONFIG_SH7751_PCI)
16int pci_sh7751_init(struct pci_controller *hose);
17#elif defined(CONFIG_SH7780_PCI)
Yusuke Godac77aa172008-03-05 14:30:02 +090018int pci_sh7780_init(struct pci_controller *hose);
19#else
20#error "Not support PCI."
21#endif
22
Nobuhiro Iwamatsue58917e2008-09-18 19:34:36 +090023int pci_sh4_init(struct pci_controller *hose);
Yusuke Godac77aa172008-03-05 14:30:02 +090024/* PCI dword read for sh4 */
25int pci_sh4_read_config_dword(struct pci_controller *hose,
26 pci_dev_t dev, int offset, u32 *value);
27
28/* PCI dword write for sh4 */
29int pci_sh4_write_config_dword(struct pci_controller *hose,
30 pci_dev_t dev, int offset, u32 value);
31
32#endif /* _ASM_PCI_H_ */