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Hans de Goededb325e82015-04-15 19:03:49 +02001/*
2 * Copyright 2013 Maxime Ripard
3 *
4 * Maxime Ripard <maxime.ripard@free-electrons.com>
5 *
6 * This file is dual-licensed: you can use it either under the terms
7 * of the GPL or the X11 license, at your option. Note that this dual
8 * licensing only applies to this file, and not this project as a
9 * whole.
10 *
11 * a) This library is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License as
13 * published by the Free Software Foundation; either version 2 of the
14 * License, or (at your option) any later version.
15 *
16 * This library is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
20 *
Hans de Goededb325e82015-04-15 19:03:49 +020021 * Or, alternatively,
22 *
23 * b) Permission is hereby granted, free of charge, to any person
24 * obtaining a copy of this software and associated documentation
25 * files (the "Software"), to deal in the Software without
26 * restriction, including without limitation the rights to use,
27 * copy, modify, merge, publish, distribute, sublicense, and/or
28 * sell copies of the Software, and to permit persons to whom the
29 * Software is furnished to do so, subject to the following
30 * conditions:
31 *
32 * The above copyright notice and this permission notice shall be
33 * included in all copies or substantial portions of the Software.
34 *
35 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
36 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
37 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
38 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
39 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
40 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
41 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
42 * OTHER DEALINGS IN THE SOFTWARE.
43 */
44
45#include "skeleton.dtsi"
46
47#include "sun5i.dtsi"
48
49#include <dt-bindings/dma/sun4i-a10.h>
50#include <dt-bindings/pinctrl/sun4i-a10.h>
51
52/ {
53 interrupt-parent = <&intc>;
54
55 aliases {
56 ethernet0 = &emac;
57 };
58
59 chosen {
60 #address-cells = <1>;
61 #size-cells = <1>;
62 ranges;
63
64 framebuffer@0 {
Hans de Goede6ef1be32015-06-02 15:53:40 +020065 compatible = "allwinner,simple-framebuffer",
66 "simple-framebuffer";
Hans de Goededb325e82015-04-15 19:03:49 +020067 allwinner,pipeline = "de_be0-lcd0-hdmi";
68 clocks = <&pll5 1>, <&ahb_gates 36>, <&ahb_gates 43>,
69 <&ahb_gates 44>;
70 status = "disabled";
71 };
72
73 framebuffer@1 {
74 compatible = "allwinner,simple-framebuffer",
75 "simple-framebuffer";
76 allwinner,pipeline = "de_be0-lcd0";
77 clocks = <&pll5 1>, <&ahb_gates 36>, <&ahb_gates 44>;
78 status = "disabled";
79 };
80 };
81
82 clocks {
83 ahb_gates: clk@01c20060 {
84 #clock-cells = <1>;
85 compatible = "allwinner,sun5i-a10s-ahb-gates-clk";
86 reg = <0x01c20060 0x8>;
87 clocks = <&ahb>;
Hans de Goede6ef1be32015-06-02 15:53:40 +020088 clock-output-names = "ahb_usbotg", "ahb_ehci",
89 "ahb_ohci", "ahb_ss", "ahb_dma",
90 "ahb_bist", "ahb_mmc0", "ahb_mmc1",
91 "ahb_mmc2", "ahb_nand",
92 "ahb_sdram", "ahb_emac", "ahb_ts",
93 "ahb_spi0", "ahb_spi1", "ahb_spi2",
94 "ahb_gps", "ahb_stimer", "ahb_ve",
95 "ahb_tve", "ahb_lcd", "ahb_csi",
96 "ahb_hdmi", "ahb_de_be",
97 "ahb_de_fe", "ahb_iep",
98 "ahb_mali400";
Hans de Goededb325e82015-04-15 19:03:49 +020099 };
100
101 apb0_gates: clk@01c20068 {
102 #clock-cells = <1>;
103 compatible = "allwinner,sun5i-a10s-apb0-gates-clk";
104 reg = <0x01c20068 0x4>;
105 clocks = <&apb0>;
Hans de Goede6ef1be32015-06-02 15:53:40 +0200106 clock-output-names = "apb0_codec", "apb0_iis",
107 "apb0_pio", "apb0_ir",
108 "apb0_keypad";
Hans de Goededb325e82015-04-15 19:03:49 +0200109 };
110
111 apb1_gates: clk@01c2006c {
112 #clock-cells = <1>;
113 compatible = "allwinner,sun5i-a10s-apb1-gates-clk";
114 reg = <0x01c2006c 0x4>;
115 clocks = <&apb1>;
116 clock-output-names = "apb1_i2c0", "apb1_i2c1",
117 "apb1_i2c2", "apb1_uart0", "apb1_uart1",
118 "apb1_uart2", "apb1_uart3";
119 };
120 };
121
122 soc@01c00000 {
123 emac: ethernet@01c0b000 {
124 compatible = "allwinner,sun4i-a10-emac";
125 reg = <0x01c0b000 0x1000>;
126 interrupts = <55>;
127 clocks = <&ahb_gates 17>;
Hans de Goede6ef1be32015-06-02 15:53:40 +0200128 allwinner,sram = <&emac_sram 1>;
Hans de Goededb325e82015-04-15 19:03:49 +0200129 status = "disabled";
130 };
131
132 mdio: mdio@01c0b080 {
133 compatible = "allwinner,sun4i-a10-mdio";
134 reg = <0x01c0b080 0x14>;
135 status = "disabled";
136 #address-cells = <1>;
137 #size-cells = <0>;
138 };
139
140 uart0: serial@01c28000 {
141 compatible = "snps,dw-apb-uart";
142 reg = <0x01c28000 0x400>;
143 interrupts = <1>;
144 reg-shift = <2>;
145 reg-io-width = <4>;
146 clocks = <&apb1_gates 16>;
147 status = "disabled";
148 };
149
150 uart2: serial@01c28800 {
151 compatible = "snps,dw-apb-uart";
152 reg = <0x01c28800 0x400>;
153 interrupts = <3>;
154 reg-shift = <2>;
155 reg-io-width = <4>;
156 clocks = <&apb1_gates 18>;
157 status = "disabled";
158 };
159 };
160};
161
162&pio {
163 compatible = "allwinner,sun5i-a10s-pinctrl";
164
165 uart0_pins_a: uart0@0 {
166 allwinner,pins = "PB19", "PB20";
167 allwinner,function = "uart0";
168 allwinner,drive = <SUN4I_PINCTRL_10_MA>;
169 allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
170 };
171
172 uart2_pins_a: uart2@0 {
173 allwinner,pins = "PC18", "PC19";
174 allwinner,function = "uart2";
175 allwinner,drive = <SUN4I_PINCTRL_10_MA>;
176 allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
177 };
178
179 uart3_pins_a: uart3@0 {
180 allwinner,pins = "PG9", "PG10";
181 allwinner,function = "uart3";
182 allwinner,drive = <SUN4I_PINCTRL_10_MA>;
183 allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
184 };
185
186 emac_pins_a: emac0@0 {
187 allwinner,pins = "PA0", "PA1", "PA2",
188 "PA3", "PA4", "PA5", "PA6",
189 "PA7", "PA8", "PA9", "PA10",
190 "PA11", "PA12", "PA13", "PA14",
191 "PA15", "PA16";
192 allwinner,function = "emac";
193 allwinner,drive = <SUN4I_PINCTRL_10_MA>;
194 allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
195 };
196
197 mmc1_pins_a: mmc1@0 {
Hans de Goede6ef1be32015-06-02 15:53:40 +0200198 allwinner,pins = "PG3", "PG4", "PG5",
199 "PG6", "PG7", "PG8";
Hans de Goededb325e82015-04-15 19:03:49 +0200200 allwinner,function = "mmc1";
201 allwinner,drive = <SUN4I_PINCTRL_30_MA>;
202 allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
203 };
204};
Hans de Goede6ef1be32015-06-02 15:53:40 +0200205
206&sram_a {
207 emac_sram: sram-section@8000 {
208 compatible = "allwinner,sun4i-a10-sram-a3-a4";
209 reg = <0x8000 0x4000>;
210 status = "disabled";
211 };
212};