blob: ce88893e3418f7b01c2ee37fcd70eeb39f61a88c [file] [log] [blame]
Udit Kumared92ede2023-05-11 14:47:48 +05301.. SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
2.. sectionauthor:: Udit Kumar <u-kumar1@ti.com>
3
4J7200 Platforms
5===============
6
7Introduction:
8-------------
9The J7200 family of SoCs are part of K3 Multicore SoC architecture platform
10targeting automotive applications. They are designed as a low power, high
11performance and highly integrated device architecture, adding significant
12enhancement on processing power, graphics capability, video and imaging
13processing, virtualization and coherent memory support.
14
15The device is partitioned into three functional domains, each containing
16specific processing cores and peripherals:
17
181. Wake-up (WKUP) domain:
19 * Device Management and Security Controller (DMSC)
20
212. Microcontroller (MCU) domain:
22 * Dual Core ARM Cortex-R5F processor
23
243. MAIN domain:
25 * Dual core 64-bit ARM Cortex-A72
26
27More info can be found in TRM: https://www.ti.com/lit/pdf/spruiu1
28
29Boot Flow:
30----------
31Below is the pictorial representation of boot flow:
32
Nishanth Menonb47c9f72023-07-27 13:58:45 -050033.. image:: img/boot_diagram_k3_current.svg
Udit Kumared92ede2023-05-11 14:47:48 +053034
35- Here DMSC acts as master and provides all the critical services. R5/A72
36 requests DMSC to get these services done as shown in the above diagram.
37
38Sources:
39--------
Udit Kumared92ede2023-05-11 14:47:48 +053040
Nishanth Menonee91e482023-07-27 13:58:44 -050041.. include:: k3.rst
42 :start-after: .. k3_rst_include_start_boot_sources
43 :end-before: .. k3_rst_include_end_boot_sources
Udit Kumared92ede2023-05-11 14:47:48 +053044
Udit Kumared92ede2023-05-11 14:47:48 +053045Build procedure:
46----------------
Nishanth Menonb7ee22f2023-07-27 13:58:48 -0500470. Setup the environment variables:
Udit Kumared92ede2023-05-11 14:47:48 +053048
Nishanth Menonb7ee22f2023-07-27 13:58:48 -050049.. include:: k3.rst
50 :start-after: .. k3_rst_include_start_common_env_vars_desc
51 :end-before: .. k3_rst_include_end_common_env_vars_desc
Udit Kumared92ede2023-05-11 14:47:48 +053052
Nishanth Menonb7ee22f2023-07-27 13:58:48 -050053.. include:: k3.rst
54 :start-after: .. k3_rst_include_start_board_env_vars_desc
55 :end-before: .. k3_rst_include_end_board_env_vars_desc
Udit Kumared92ede2023-05-11 14:47:48 +053056
Nishanth Menonb7ee22f2023-07-27 13:58:48 -050057Set the variables corresponding to this platform:
Udit Kumared92ede2023-05-11 14:47:48 +053058
Nishanth Menonb7ee22f2023-07-27 13:58:48 -050059.. include:: k3.rst
60 :start-after: .. k3_rst_include_start_common_env_vars_defn
61 :end-before: .. k3_rst_include_end_common_env_vars_defn
Udit Kumared92ede2023-05-11 14:47:48 +053062.. code-block:: bash
63
Nishanth Menonb7ee22f2023-07-27 13:58:48 -050064 $ export UBOOT_CFG_CORTEXR=j7200_evm_r5_defconfig
65 $ export UBOOT_CFG_CORTEXA=j7200_evm_a72_defconfig
66 $ export TFA_BOARD=generic
67 $ # we dont use any extra TFA parameters
68 $ unset TFA_EXTRA_ARGS
69 $ export OPTEE_PLATFORM=k3-j7200
70 $ # we dont use any extra OP-TEE parameters
71 $ unset OPTEE_EXTRA_ARGS
72
73.. j7200_evm_rst_include_start_build_steps
74
751. Trusted Firmware-A:
76
77.. include:: k3.rst
78 :start-after: .. k3_rst_include_start_build_steps_tfa
79 :end-before: .. k3_rst_include_end_build_steps_tfa
80
81
822. OP-TEE:
83
84.. include:: k3.rst
85 :start-after: .. k3_rst_include_start_build_steps_optee
86 :end-before: .. k3_rst_include_end_build_steps_optee
Udit Kumared92ede2023-05-11 14:47:48 +053087
Neha Malcom Francis507be122023-07-22 00:14:43 +0530883. U-Boot:
Udit Kumared92ede2023-05-11 14:47:48 +053089
90* 4.1 R5:
91
Nishanth Menonb7ee22f2023-07-27 13:58:48 -050092.. include:: k3.rst
93 :start-after: .. k3_rst_include_start_build_steps_spl_r5
94 :end-before: .. k3_rst_include_end_build_steps_spl_r5
Udit Kumared92ede2023-05-11 14:47:48 +053095
96* 4.2 A72:
97
Nishanth Menonb7ee22f2023-07-27 13:58:48 -050098.. include:: k3.rst
99 :start-after: .. k3_rst_include_start_build_steps_uboot
100 :end-before: .. k3_rst_include_end_build_steps_uboot
101.. j7200_evm_rst_include_end_build_steps
Udit Kumared92ede2023-05-11 14:47:48 +0530102
103Target Images
104--------------
Tom Rinifdf45032023-07-25 12:44:16 -0400105In order to boot we need tiboot3.bin, tispl.bin and u-boot.img. Each SoC
106variant (GP, HS-FS, HS-SE) requires a different source for these files.
Neha Malcom Francis507be122023-07-22 00:14:43 +0530107
108 - GP
109
110 * tiboot3-j7200-gp-evm.bin from step 4.1
111 * tispl.bin_unsigned, u-boot.img_unsigned from step 4.2
112
113 - HS-FS
114
115 * tiboot3-j7200_sr2-hs-fs-evm.bin from step 4.1
116 * tispl.bin, u-boot.img from step 4.2
117
118 - HS-SE
119
120 * tiboot3-j7200_sr2-hs-evm.bin from step 4.1
121 * tispl.bin, u-boot.img from step 4.2
Udit Kumared92ede2023-05-11 14:47:48 +0530122
123Image formats:
124--------------
125
126- tiboot3.bin:
127
128.. code-block:: console
129
130 +-----------------------+
131 | X.509 |
132 | Certificate |
133 | +-------------------+ |
134 | | | |
135 | | R5 | |
136 | | u-boot-spl.bin | |
137 | | | |
138 | +-------------------+ |
139 | | | |
140 | | FIT header | |
141 | | +---------------+ | |
142 | | | | | |
143 | | | DTB 1...N | | |
144 | | +---------------+ | |
145 | +-------------------+ |
146 | | | |
147 | | FIT HEADER | |
148 | | +---------------+ | |
149 | | | | | |
150 | | | sysfw.bin | | |
151 | | +---------------+ | |
152 | | | | | |
153 | | | board config | | |
154 | | +---------------+ | |
155 | | | | | |
156 | | | PM config | | |
157 | | +---------------+ | |
158 | | | | | |
159 | | | RM config | | |
160 | | +---------------+ | |
161 | | | | | |
162 | | | Secure config | | |
163 | | +---------------+ | |
164 | +-------------------+ |
165 +-----------------------+
166
167- tispl.bin
168
169.. code-block:: console
170
171 +-----------------------+
172 | |
173 | FIT HEADER |
174 | +-------------------+ |
175 | | | |
Neha Malcom Francis507be122023-07-22 00:14:43 +0530176 | | A72 TF-A | |
Udit Kumared92ede2023-05-11 14:47:48 +0530177 | +-------------------+ |
178 | | | |
Neha Malcom Francis507be122023-07-22 00:14:43 +0530179 | | A72 OP-TEE | |
Udit Kumared92ede2023-05-11 14:47:48 +0530180 | +-------------------+ |
181 | | | |
182 | | R5 DM FW | |
183 | +-------------------+ |
184 | | | |
185 | | A72 SPL | |
186 | +-------------------+ |
187 | | | |
188 | | SPL DTB 1...N | |
189 | +-------------------+ |
190 +-----------------------+
191
192
193Switch Setting for Boot Mode
194----------------------------
195
196Boot Mode pins provide means to select the boot mode and options before the
197device is powered up. After every POR, they are the main source to populate
198the Boot Parameter Tables.
199
200The following table shows some common boot modes used on J7200 platform. More
201details can be found in the Technical Reference Manual:
202https://www.ti.com/lit/pdf/spruiu1 under the `Boot Mode Pins` section.
203
204
205*Boot Modes*
206
207============ ============= =============
208Switch Label SW9: 12345678 SW8: 12345678
209============ ============= =============
210SD 00000000 10000010
211EMMC 01000000 10000000
212OSPI 01000000 00000110
213UART 01110000 00000000
214USB DFU 00100000 10000000
215============ ============= =============
216
217For SW8 and SW9, the switch state in the "ON" position = 1.
218
219eMMC:
220-----
221ROM supports booting from eMMC raw read or UDA FS mode.
222
223Below is memory layout in case of booting from
224boot 0/1 partition in raw mode.
225
226Current allocated size for tiboot3 size is 1MB, tispl is 2MB.
227
228Size of u-boot.img is taken 4MB for refernece,
229But this is subject to change depending upon atf, optee size
230
231.. code-block:: console
232
233 boot0/1 partition (8 MB) user partition
234 0x0+----------------------------------+ 0x0+------------------------+
235 | tiboot3.bin (1 MB) | | |
236 0x800+----------------------------------+ | |
237 | tispl.bin (2 MB) | | |
238 0x1800+----------------------------------+ | |
239 | u-boot.img (4MB) | | |
240 0x3800+----------------------------------+ | |
241 | | | |
242 0x3900+ environment | | |
243 | | | |
244 0x3A00+----------------------------------+ +-------------------------+
245
246In case of UDA FS mode booting, following is layout.
247
248All boot images tiboot3.bin, tispl and u-boot should be written to
249fat formatted UDA FS as file.
250
251.. code-block:: console
252
253 boot0/1 partition (8 MB) user partition
254 0x0+---------------------------------+ 0x0+-------------------------+
255 | | | tiboot3.bin* |
256 0x800+----------------------------------+ | |
257 | | | tispl.bin |
258 0x1800+----------------------------------+ | |
259 | | | u-boot.img |
260 0x3800+----------------------------------+ | |
261 | | | |
262 0x3900+ | | environment |
263 | | | |
264 0x3A00+----------------------------------+ +-------------------------+
265
266
267
268In case of booting from eMMC, write above images into raw or UDA FS.
269and set mmc partconf accordingly.