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git01.mediatek.com / filogic / uboot / b1db1880cfd50183f4e318857658d26dd31ff5c0 / . / arch / arm / dts / rk3288-miqi-u-boot.dtsi
blob: 05e07425c751365411b7cc1a0938d019004888b6 [file] [log] [blame]
Kever Yang00ac5192019-07-09 21:58:52 +0800[diff] [blame]1// SPDX-License-Identifier: GPL-2.0+
2/*
3 * Copyright (C) 2019 Rockchip Electronics Co., Ltd
4 */
5
6#include "rk3288-u-boot.dtsi"
Johan Jonker8ba3d4062022-04-15 23:21:39 +0200[diff] [blame]7
8&dmc {
9 rockchip,pctl-timing = <0x29a 0xc8 0x1f8 0x42 0x4e 0x4 0xea 0xa
10 0x5 0x0 0xa 0x7 0x19 0x24 0xa 0x7
11 0x5 0xa 0x5 0x200 0x5 0x10 0x40 0x0
12 0x1 0x7 0x7 0x4 0xc 0x43 0x100 0x0
13 0x5 0x0>;
14 rockchip,phy-timing = <0x48f9aab4 0xea0910 0x1002c200
15 0xa60 0x40 0x10 0x0>;
16 rockchip,sdram-params = <0x30B25564 0x627 3 666000000 3 9 1>;
17};
Kever Yang00ac5192019-07-09 21:58:52 +0800[diff] [blame]18
Jonas Karlmanfd6ebba2024-11-05 21:51:37 +0000[diff] [blame]19&emmc {
Jonas Karlmanb1db1882024-11-05 21:51:41 +0000[diff] [blame^]20 bootph-pre-ram;
21 bootph-some-ram;
22};
23
24&emmc_bus8 {
25 bootph-pre-ram;
26 bootph-some-ram;
27};
28
29&emmc_clk {
30 bootph-pre-ram;
31 bootph-some-ram;
32};
33
34&emmc_cmd {
35 bootph-pre-ram;
36 bootph-some-ram;
37};
38
39&emmc_pwr {
40 bootph-pre-ram;
41 bootph-some-ram;
42};
43
44&gpio7 {
45 /delete-property/ bootph-all;
46};
47
48&pcfg_pull_none {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]49 bootph-all;
Kever Yang00ac5192019-07-09 21:58:52 +0800[diff] [blame]50};
51
Jonas Karlmanb1db1882024-11-05 21:51:41 +0000[diff] [blame^]52&pcfg_pull_none_12ma {
53 bootph-pre-ram;
54 bootph-some-ram;
55};
56
57&pcfg_pull_up {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]58 bootph-all;
Kever Yang00ac5192019-07-09 21:58:52 +0800[diff] [blame]59};
60
Jonas Karlmanb1db1882024-11-05 21:51:41 +0000[diff] [blame^]61&pcfg_pull_up_drv_12ma {
62 bootph-pre-ram;
63 bootph-some-ram;
64};
65
Kever Yang00ac5192019-07-09 21:58:52 +0800[diff] [blame]66&sdmmc {
Jonas Karlmanb1db1882024-11-05 21:51:41 +0000[diff] [blame^]67 bootph-pre-ram;
68 bootph-some-ram;
Kever Yang00ac5192019-07-09 21:58:52 +0800[diff] [blame]69};
70
Kever Yang00ac5192019-07-09 21:58:52 +0800[diff] [blame]71&sdmmc_bus4 {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]72 bootph-pre-ram;
Jonas Karlmanb1db1882024-11-05 21:51:41 +0000[diff] [blame^]73 bootph-some-ram;
74};
75
76&sdmmc_cd {
77 bootph-pre-ram;
78 bootph-some-ram;
Kever Yang00ac5192019-07-09 21:58:52 +0800[diff] [blame]79};
80
81&sdmmc_clk {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]82 bootph-pre-ram;
Jonas Karlmanb1db1882024-11-05 21:51:41 +0000[diff] [blame^]83 bootph-some-ram;
Kever Yang00ac5192019-07-09 21:58:52 +0800[diff] [blame]84};
85
86&sdmmc_cmd {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]87 bootph-pre-ram;
Jonas Karlmanb1db1882024-11-05 21:51:41 +0000[diff] [blame^]88 bootph-some-ram;
Kever Yang00ac5192019-07-09 21:58:52 +0800[diff] [blame]89};
90
91&sdmmc_pwr {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]92 bootph-pre-ram;
Kever Yang00ac5192019-07-09 21:58:52 +0800[diff] [blame]93};
Jonas Karlmanfd6ebba2024-11-05 21:51:37 +0000[diff] [blame]94
95&uart2 {
96 bootph-all;
97};
Jonas Karlmanb1db1882024-11-05 21:51:41 +0000[diff] [blame^]98
99&uart2_xfer {
100 bootph-pre-sram;
101 bootph-pre-ram;
102};