| Tom Rini | 10e4779 | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0 */ |
| Tom Warren | c47e717 | 2013-01-28 13:32:07 +0000 | [diff] [blame] | 2 | /* |
| 3 | * Copyright (c) 2010-2013, NVIDIA CORPORATION. All rights reserved. |
| Tom Warren | c47e717 | 2013-01-28 13:32:07 +0000 | [diff] [blame] | 4 | */ |
| 5 | |
| 6 | #ifndef _TEGRA114_FLOW_H_ |
| 7 | #define _TEGRA114_FLOW_H_ |
| 8 | |
| 9 | struct flow_ctlr { |
| 10 | u32 halt_cpu_events; |
| 11 | u32 halt_cop_events; |
| 12 | u32 cpu_csr; |
| 13 | u32 cop_csr; |
| 14 | u32 xrq_events; |
| 15 | u32 halt_cpu1_events; |
| 16 | u32 cpu1_csr; |
| 17 | u32 halt_cpu2_events; |
| 18 | u32 cpu2_csr; |
| 19 | u32 halt_cpu3_events; |
| 20 | u32 cpu3_csr; |
| 21 | u32 cluster_control; |
| 22 | }; |
| 23 | |
| 24 | #endif /* _TEGRA114_FLOW_H_ */ |