blob: aeb54032d198e61c16974124706e5ba453234c9a [file] [log] [blame]
Tom Rini10e47792018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
Yoshihiro Shimoda07fecef2012-11-04 15:53:22 +00002/*
3 * Configuation settings for the sh7752evb board
4 *
5 * Copyright (C) 2012 Renesas Solutions Corp.
Yoshihiro Shimoda07fecef2012-11-04 15:53:22 +00006 */
7
8#ifndef __SH7752EVB_H
9#define __SH7752EVB_H
10
Yoshihiro Shimoda07fecef2012-11-04 15:53:22 +000011#define CONFIG_CPU_SH7752 1
Yoshihiro Shimoda07fecef2012-11-04 15:53:22 +000012
Vladimir Zapolskiy5e72b842016-11-28 00:15:30 +020013#define CONFIG_DISPLAY_BOARDINFO
Yoshihiro Shimoda07fecef2012-11-04 15:53:22 +000014
15/* MEMORY */
16#define SH7752EVB_SDRAM_BASE (0x40000000)
17#define SH7752EVB_SDRAM_SIZE (512 * 1024 * 1024)
18
Yoshihiro Shimoda07fecef2012-11-04 15:53:22 +000019#define CONFIG_SYS_PBSIZE 256
Yoshihiro Shimoda07fecef2012-11-04 15:53:22 +000020#define CONFIG_SYS_BAUDRATE_TABLE { 115200 }
21
22/* SCIF */
Yoshihiro Shimoda07fecef2012-11-04 15:53:22 +000023#define CONFIG_CONS_SCIF2 1
Yoshihiro Shimoda07fecef2012-11-04 15:53:22 +000024
Yoshihiro Shimoda07fecef2012-11-04 15:53:22 +000025#undef CONFIG_SYS_LOADS_BAUD_CHANGE
26
27#define CONFIG_SYS_SDRAM_BASE (SH7752EVB_SDRAM_BASE)
28#define CONFIG_SYS_SDRAM_SIZE (SH7752EVB_SDRAM_SIZE)
29#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + \
30 128 * 1024 * 1024)
31
32#define CONFIG_SYS_MONITOR_BASE 0x00000000
33#define CONFIG_SYS_MONITOR_LEN (512 * 1024)
34#define CONFIG_SYS_MALLOC_LEN (4 * 1024 * 1024)
35#define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024)
36
Yoshihiro Shimoda07fecef2012-11-04 15:53:22 +000037/* Ether */
Yoshihiro Shimoda07fecef2012-11-04 15:53:22 +000038#define CONFIG_SH_ETHER_USE_PORT 0
39#define CONFIG_SH_ETHER_PHY_ADDR 18
40#define CONFIG_SH_ETHER_CACHE_WRITEBACK 1
41#define CONFIG_SH_ETHER_USE_GETHER 1
Yoshihiro Shimoda07fecef2012-11-04 15:53:22 +000042#define CONFIG_BITBANGMII_MULTI
43#define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RGMII
Yoshihiro Shimoda07fecef2012-11-04 15:53:22 +000044
45#define SH7752EVB_ETHERNET_MAC_BASE_SPI 0x00090000
46#define SH7752EVB_SPI_SECTOR_SIZE (64 * 1024)
47#define SH7752EVB_ETHERNET_MAC_BASE SH7752EVB_ETHERNET_MAC_BASE_SPI
48#define SH7752EVB_ETHERNET_MAC_SIZE 17
49#define SH7752EVB_ETHERNET_NUM_CH 2
Yoshihiro Shimoda07fecef2012-11-04 15:53:22 +000050
51/* SPI */
Yoshihiro Shimoda07fecef2012-11-04 15:53:22 +000052#define CONFIG_SH_SPI_BASE 0xfe002000
Yoshihiro Shimoda07fecef2012-11-04 15:53:22 +000053
54/* MMCIF */
Yoshihiro Shimoda07fecef2012-11-04 15:53:22 +000055#define CONFIG_SH_MMCIF_ADDR 0xffcb0000
56#define CONFIG_SH_MMCIF_CLK 48000000
57
58/* ENV setting */
Yoshihiro Shimoda07fecef2012-11-04 15:53:22 +000059#define CONFIG_EXTRA_ENV_SETTINGS \
60 "netboot=bootp; bootm\0"
61
62/* Board Clock */
63#define CONFIG_SYS_CLK_FREQ 48000000
Nobuhiro Iwamatsue6984492013-08-21 16:11:21 +090064#define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
Yoshihiro Shimoda07fecef2012-11-04 15:53:22 +000065#endif /* __SH7752EVB_H */