| Nobuhiro Iwamatsu | c6ccb47 | 2013-11-21 17:06:45 +0900 | [diff] [blame] | 1 | /* |
| 2 | * arch/arm/cpu/armv7/rmobile/pfc-r8a7790.h |
| 3 | * |
| 4 | * Copyright (C) 2013 Renesas Electronics Corporation |
| 5 | * |
| 6 | * SPDX-License-Identifier: GPL-2.0 |
| 7 | */ |
| 8 | |
| 9 | #ifndef __PFC_R8A7790_H__ |
| 10 | #define __PFC_R8A7790_H__ |
| 11 | |
| 12 | #include <sh_pfc.h> |
| 13 | #include <asm/gpio.h> |
| 14 | |
| 15 | #define CPU_32_PORT(fn, pfx, sfx) \ |
| 16 | PORT_10(fn, pfx, sfx), PORT_10(fn, pfx##1, sfx), \ |
| 17 | PORT_10(fn, pfx##2, sfx), PORT_1(fn, pfx##30, sfx), \ |
| 18 | PORT_1(fn, pfx##31, sfx) |
| 19 | |
| 20 | #define CPU_32_PORT2(fn, pfx, sfx) \ |
| 21 | PORT_10(fn, pfx, sfx), PORT_10(fn, pfx##1, sfx), \ |
| 22 | PORT_10(fn, pfx##2, sfx) |
| 23 | |
| 24 | #if defined(CONFIG_R8A7790) |
| 25 | #define CPU_32_PORT1(fn, pfx, sfx) \ |
| 26 | PORT_10(fn, pfx, sfx), PORT_10(fn, pfx##1, sfx), \ |
| 27 | PORT_10(fn, pfx##2, sfx) \ |
| 28 | /* GP_0_0_DATA -> GP_5_31_DATA (except for GP1[30],GP1[31],GP2[30],GP2[31]) */ |
| 29 | #define CPU_ALL_PORT(fn, pfx, sfx) \ |
| 30 | CPU_32_PORT(fn, pfx##_0_, sfx), \ |
| 31 | CPU_32_PORT1(fn, pfx##_1_, sfx), \ |
| 32 | CPU_32_PORT2(fn, pfx##_2_, sfx), \ |
| 33 | CPU_32_PORT(fn, pfx##_3_, sfx), \ |
| 34 | CPU_32_PORT(fn, pfx##_4_, sfx), \ |
| 35 | CPU_32_PORT(fn, pfx##_5_, sfx) |
| 36 | |
| 37 | #elif defined(CONFIG_R8A7791) |
| 38 | #define CPU_32_PORT1(fn, pfx, sfx) \ |
| 39 | PORT_10(fn, pfx, sfx), PORT_10(fn, pfx##1, sfx), \ |
| 40 | PORT_1(fn, pfx##20, sfx), PORT_1(fn, pfx##21, sfx), \ |
| 41 | PORT_1(fn, pfx##22, sfx), PORT_1(fn, pfx##23, sfx), \ |
| 42 | PORT_1(fn, pfx##24, sfx), PORT_1(fn, pfx##25, sfx) |
| 43 | |
| 44 | /* |
| 45 | * GP_0_0_DATA -> GP_7_25_DATA |
| 46 | * (except for GP1[26],GP1[27],GP1[28],GP1[29]),GP1[30]),GP1[31] |
| 47 | * GP7[26],GP7[27],GP7[28],GP7[29]),GP7[30]),GP7[31]) |
| 48 | */ |
| 49 | #define CPU_ALL_PORT(fn, pfx, sfx) \ |
| 50 | CPU_32_PORT(fn, pfx##_0_, sfx), \ |
| 51 | CPU_32_PORT1(fn, pfx##_1_, sfx), \ |
| 52 | CPU_32_PORT(fn, pfx##_2_, sfx), \ |
| 53 | CPU_32_PORT(fn, pfx##_3_, sfx), \ |
| 54 | CPU_32_PORT(fn, pfx##_4_, sfx), \ |
| 55 | CPU_32_PORT(fn, pfx##_5_, sfx), \ |
| 56 | CPU_32_PORT(fn, pfx##_6_, sfx), \ |
| 57 | CPU_32_PORT1(fn, pfx##_7_, sfx) |
| 58 | #else |
| 59 | #error "NO support" |
| 60 | #endif |
| 61 | |
| 62 | #define _GP_GPIO(pfx, sfx) PINMUX_GPIO(GPIO_GP##pfx, GP##pfx##_DATA) |
| 63 | #define _GP_DATA(pfx, sfx) PINMUX_DATA(GP##pfx##_DATA, GP##pfx##_FN, \ |
| 64 | GP##pfx##_IN, GP##pfx##_OUT) |
| 65 | |
| 66 | #define _GP_INOUTSEL(pfx, sfx) GP##pfx##_IN, GP##pfx##_OUT |
| 67 | #define _GP_INDT(pfx, sfx) GP##pfx##_DATA |
| 68 | |
| 69 | #define GP_ALL(str) CPU_ALL_PORT(_PORT_ALL, GP, str) |
| 70 | #define PINMUX_GPIO_GP_ALL() CPU_ALL_PORT(_GP_GPIO, , unused) |
| 71 | #define PINMUX_DATA_GP_ALL() CPU_ALL_PORT(_GP_DATA, , unused) |
| 72 | |
| 73 | #define PORT_10_REV(fn, pfx, sfx) \ |
| 74 | PORT_1(fn, pfx##9, sfx), PORT_1(fn, pfx##8, sfx), \ |
| 75 | PORT_1(fn, pfx##7, sfx), PORT_1(fn, pfx##6, sfx), \ |
| 76 | PORT_1(fn, pfx##5, sfx), PORT_1(fn, pfx##4, sfx), \ |
| 77 | PORT_1(fn, pfx##3, sfx), PORT_1(fn, pfx##2, sfx), \ |
| 78 | PORT_1(fn, pfx##1, sfx), PORT_1(fn, pfx##0, sfx) |
| 79 | |
| 80 | #define CPU_32_PORT_REV(fn, pfx, sfx) \ |
| 81 | PORT_1(fn, pfx##31, sfx), PORT_1(fn, pfx##30, sfx), \ |
| 82 | PORT_10_REV(fn, pfx##2, sfx), PORT_10_REV(fn, pfx##1, sfx), \ |
| 83 | PORT_10_REV(fn, pfx, sfx) |
| 84 | |
| 85 | #define GP_INOUTSEL(bank) CPU_32_PORT_REV(_GP_INOUTSEL, _##bank##_, unused) |
| 86 | #define GP_INDT(bank) CPU_32_PORT_REV(_GP_INDT, _##bank##_, unused) |
| 87 | |
| 88 | #define PINMUX_IPSR_DATA(ipsr, fn) PINMUX_DATA(fn##_MARK, FN_##ipsr, FN_##fn) |
| 89 | #define PINMUX_IPSR_MODSEL_DATA(ipsr, fn, ms) PINMUX_DATA(fn##_MARK, FN_##ms, \ |
| 90 | FN_##ipsr, FN_##fn) |
| 91 | |
| 92 | #endif /* __PFC_R8A7790_H__ */ |