Peng Fan | 0fe6f16 | 2019-04-12 07:54:54 +0000 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0 |
| 2 | /* |
| 3 | * Copyright 2019 NXP |
| 4 | */ |
| 5 | |
| 6 | #include <common.h> |
| 7 | #include <console.h> |
| 8 | #include <errno.h> |
| 9 | #include <fuse.h> |
| 10 | #include <asm/arch/sci/sci.h> |
| 11 | #include <asm/arch/sys_proto.h> |
Peng Fan | b0b4441 | 2020-05-11 15:16:07 +0800 | [diff] [blame^] | 12 | #include <linux/arm-smccc.h> |
Peng Fan | 0fe6f16 | 2019-04-12 07:54:54 +0000 | [diff] [blame] | 13 | |
| 14 | DECLARE_GLOBAL_DATA_PTR; |
| 15 | |
| 16 | #define FSL_ECC_WORD_START_1 0x10 |
| 17 | #define FSL_ECC_WORD_END_1 0x10F |
| 18 | |
Ye Li | 390f460 | 2020-05-03 22:31:46 +0800 | [diff] [blame] | 19 | #ifdef CONFIG_IMX8QM |
| 20 | #define FSL_ECC_WORD_START_2 0x1A0 |
| 21 | #define FSL_ECC_WORD_END_2 0x1FF |
| 22 | #elif defined(CONFIG_IMX8QXP) |
Peng Fan | 0fe6f16 | 2019-04-12 07:54:54 +0000 | [diff] [blame] | 23 | #define FSL_ECC_WORD_START_2 0x220 |
| 24 | #define FSL_ECC_WORD_END_2 0x31F |
Ye Li | 390f460 | 2020-05-03 22:31:46 +0800 | [diff] [blame] | 25 | #endif |
Peng Fan | 0fe6f16 | 2019-04-12 07:54:54 +0000 | [diff] [blame] | 26 | |
| 27 | #define FSL_QXP_FUSE_GAP_START 0x110 |
| 28 | #define FSL_QXP_FUSE_GAP_END 0x21F |
Peng Fan | 0fe6f16 | 2019-04-12 07:54:54 +0000 | [diff] [blame] | 29 | |
| 30 | #define FSL_SIP_OTP_READ 0xc200000A |
| 31 | #define FSL_SIP_OTP_WRITE 0xc200000B |
| 32 | |
| 33 | int fuse_read(u32 bank, u32 word, u32 *val) |
| 34 | { |
| 35 | return fuse_sense(bank, word, val); |
| 36 | } |
| 37 | |
| 38 | int fuse_sense(u32 bank, u32 word, u32 *val) |
| 39 | { |
Peng Fan | b0b4441 | 2020-05-11 15:16:07 +0800 | [diff] [blame^] | 40 | struct arm_smccc_res res; |
Peng Fan | 0fe6f16 | 2019-04-12 07:54:54 +0000 | [diff] [blame] | 41 | |
| 42 | if (bank != 0) { |
| 43 | printf("Invalid bank argument, ONLY bank 0 is supported\n"); |
| 44 | return -EINVAL; |
| 45 | } |
| 46 | |
Peng Fan | b0b4441 | 2020-05-11 15:16:07 +0800 | [diff] [blame^] | 47 | arm_smccc_smc(FSL_SIP_OTP_READ, (unsigned long)word, 0, 0, |
| 48 | 0, 0, 0, 0, &res); |
| 49 | *val = (u32)res.a1; |
Peng Fan | 0fe6f16 | 2019-04-12 07:54:54 +0000 | [diff] [blame] | 50 | |
Peng Fan | b0b4441 | 2020-05-11 15:16:07 +0800 | [diff] [blame^] | 51 | return res.a0; |
Peng Fan | 0fe6f16 | 2019-04-12 07:54:54 +0000 | [diff] [blame] | 52 | } |
| 53 | |
| 54 | int fuse_prog(u32 bank, u32 word, u32 val) |
| 55 | { |
Peng Fan | b0b4441 | 2020-05-11 15:16:07 +0800 | [diff] [blame^] | 56 | struct arm_smccc_res res; |
| 57 | |
Peng Fan | 0fe6f16 | 2019-04-12 07:54:54 +0000 | [diff] [blame] | 58 | if (bank != 0) { |
| 59 | printf("Invalid bank argument, ONLY bank 0 is supported\n"); |
| 60 | return -EINVAL; |
| 61 | } |
| 62 | |
| 63 | if (IS_ENABLED(CONFIG_IMX8QXP)) { |
| 64 | if (word >= FSL_QXP_FUSE_GAP_START && |
| 65 | word <= FSL_QXP_FUSE_GAP_END) { |
| 66 | printf("Invalid word argument for this SoC\n"); |
| 67 | return -EINVAL; |
| 68 | } |
| 69 | } |
| 70 | |
| 71 | if ((word >= FSL_ECC_WORD_START_1 && word <= FSL_ECC_WORD_END_1) || |
| 72 | (word >= FSL_ECC_WORD_START_2 && word <= FSL_ECC_WORD_END_2)) { |
| 73 | puts("Warning: Words in this index range have ECC protection\n" |
| 74 | "and can only be programmed once per word. Individual bit\n" |
| 75 | "operations will be rejected after the first one.\n" |
| 76 | "\n\n Really program this word? <y/N>\n"); |
| 77 | |
| 78 | if (!confirm_yesno()) { |
| 79 | puts("Word programming aborted\n"); |
| 80 | return -EPERM; |
| 81 | } |
| 82 | } |
| 83 | |
Peng Fan | b0b4441 | 2020-05-11 15:16:07 +0800 | [diff] [blame^] | 84 | arm_smccc_smc(FSL_SIP_OTP_WRITE, (unsigned long)word, |
| 85 | (unsigned long)val, 0, 0, 0, 0, 0, &res); |
| 86 | |
| 87 | return res.a0; |
Peng Fan | 0fe6f16 | 2019-04-12 07:54:54 +0000 | [diff] [blame] | 88 | } |
| 89 | |
| 90 | int fuse_override(u32 bank, u32 word, u32 val) |
| 91 | { |
| 92 | printf("Override fuse to i.MX8 in u-boot is forbidden\n"); |
| 93 | return -EPERM; |
| 94 | } |