Masahiro Yamada | d5f8fee | 2015-03-12 13:24:39 +0900 | [diff] [blame] | 1 | CONFIG_PPC=y |
Simon Glass | 72cc538 | 2022-10-20 18:22:39 -0600 | [diff] [blame] | 2 | CONFIG_TEXT_BASE=0x11000000 |
Tom Rini | e25a03a | 2021-11-01 12:19:22 +0000 | [diff] [blame] | 3 | CONFIG_SYS_MALLOC_LEN=0x100000 |
Simon Glass | f2a8946 | 2016-09-12 23:18:41 -0600 | [diff] [blame] | 4 | CONFIG_SPL_LIBCOMMON_SUPPORT=y |
Simon Glass | b16c92c | 2016-09-12 23:18:43 -0600 | [diff] [blame] | 5 | CONFIG_SPL_LIBGENERIC_SUPPORT=y |
Tom Rini | 5cd7ece | 2019-11-18 20:02:10 -0500 | [diff] [blame] | 6 | CONFIG_ENV_SIZE=0x2000 |
7 | CONFIG_ENV_OFFSET=0x0 | ||||
Tom Rini | a20e51f | 2021-06-28 10:17:29 -0400 | [diff] [blame] | 8 | CONFIG_DEFAULT_DEVICE_TREE="p1020rdb-pd" |
Pali Rohár | 18209f7 | 2022-06-16 14:19:44 +0200 | [diff] [blame] | 9 | CONFIG_SPL_TEXT_BASE=0xf8f80000 |
Simon Glass | b58bfe0 | 2021-08-08 12:20:09 -0600 | [diff] [blame] | 10 | CONFIG_SPL_MMC=y |
Simon Glass | f4d6039 | 2021-08-08 12:20:12 -0600 | [diff] [blame] | 11 | CONFIG_SPL_SERIAL=y |
Tom Rini | 9bd0962 | 2018-04-07 20:27:54 -0400 | [diff] [blame] | 12 | CONFIG_SPL=y |
Masahiro Yamada | d5f8fee | 2015-03-12 13:24:39 +0900 | [diff] [blame] | 13 | CONFIG_MPC85xx=y |
Simon Glass | 9fdc0de | 2017-05-17 03:25:15 -0600 | [diff] [blame] | 14 | # CONFIG_CMD_ERRATA is not set |
York Sun | 0673238 | 2016-11-17 13:53:33 -0800 | [diff] [blame] | 15 | CONFIG_TARGET_P1020RDB_PD=y |
Tom Rini | a7fa976 | 2022-06-15 12:03:45 -0400 | [diff] [blame] | 16 | CONFIG_ENABLE_36BIT_PHYS=y |
Tom Rini | 667dd4f | 2022-06-10 22:59:37 -0400 | [diff] [blame] | 17 | CONFIG_SYS_MPC85XX_NO_RESETVEC=y |
18 | CONFIG_SPL_SYS_MPC85XX_NO_RESETVEC=y | ||||
Tom Rini | 7485ebf6 | 2022-06-20 08:07:45 -0400 | [diff] [blame] | 19 | CONFIG_PCIE1=y |
20 | CONFIG_PCIE2=y | ||||
Tom Rini | 5ca768d | 2022-01-24 21:08:41 +0000 | [diff] [blame] | 21 | CONFIG_MP=y |
Simon Glass | e3ee2fb | 2016-02-22 22:55:43 -0700 | [diff] [blame] | 22 | CONFIG_FIT=y |
23 | CONFIG_FIT_VERBOSE=y | ||||
24 | CONFIG_OF_BOARD_SETUP=y | ||||
25 | CONFIG_OF_STDOUT_VIA_ALIAS=y | ||||
Pali Rohár | 18209f7 | 2022-06-16 14:19:44 +0200 | [diff] [blame] | 26 | CONFIG_SPL_SYS_MONITOR_BASE=0xF8F80000 |
Tom Rini | 5989fd4 | 2022-06-20 08:07:42 -0400 | [diff] [blame] | 27 | CONFIG_FSL_FIXED_MMC_LOCATION=y |
Heiko Schocher | 0b368b1 | 2016-06-07 08:31:14 +0200 | [diff] [blame] | 28 | CONFIG_BOOTDELAY=10 |
Tom Rini | 5ddf172 | 2021-11-10 09:11:40 -0500 | [diff] [blame] | 29 | CONFIG_USE_BOOTCOMMAND=y |
30 | CONFIG_BOOTCOMMAND="setenv bootargs root=/dev/$bdev rw rootdelay=30 console=$consoledev,$baudrate $othbootargs;usb start;ext2load usb 0:1 $loadaddr /boot/$bootfile;ext2load usb 0:1 $fdtaddr /boot/$fdtfile;bootm $loadaddr - $fdtaddr" | ||||
Simon Glass | 7a99a87 | 2017-01-23 13:31:20 -0700 | [diff] [blame] | 31 | CONFIG_BOARD_EARLY_INIT_F=y |
Mario Six | 75b23ed | 2018-03-28 14:38:15 +0200 | [diff] [blame] | 32 | CONFIG_BOARD_EARLY_INIT_R=y |
Tom Rini | f92b6fa | 2020-10-09 12:22:06 -0400 | [diff] [blame] | 33 | # CONFIG_MISC_INIT_R is not set |
Tom Rini | 623d67e | 2018-02-06 12:15:38 -0500 | [diff] [blame] | 34 | # CONFIG_SPL_FRAMEWORK is not set |
Tom Rini | abb0f52 | 2022-05-16 17:20:26 -0400 | [diff] [blame] | 35 | CONFIG_SPL_MAX_SIZE=0x20000 |
Tom Rini | e5678e4 | 2019-06-01 14:20:25 -0400 | [diff] [blame] | 36 | CONFIG_SPL_MMC_BOOT=y |
Tom Rini | 17845c5 | 2022-05-21 11:26:27 -0400 | [diff] [blame] | 37 | CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE=y |
Tom Rini | 6b15c16 | 2022-05-13 12:26:35 -0400 | [diff] [blame] | 38 | CONFIG_SPL_FLUSH_IMAGE=y |
Tom Rini | d75a779 | 2022-05-27 16:19:05 -0400 | [diff] [blame] | 39 | CONFIG_SPL_GD_ADDR=0xf8f9c000 |
Tom Rini | 6de36a7 | 2022-05-26 16:59:30 -0400 | [diff] [blame] | 40 | CONFIG_SPL_RELOC_STACK=0xf8f9d000 |
41 | CONFIG_SPL_RELOC_MALLOC=y | ||||
42 | CONFIG_SPL_RELOC_MALLOC_ADDR=0xf8fa5000 | ||||
43 | CONFIG_SPL_RELOC_MALLOC_SIZE=0x1b000 | ||||
Tom Rini | 9834b90 | 2017-03-13 13:48:42 -0400 | [diff] [blame] | 44 | CONFIG_SPL_ENV_SUPPORT=y |
Simon Glass | bccfc2e | 2021-07-10 21:14:36 -0600 | [diff] [blame] | 45 | CONFIG_SPL_I2C=y |
Simon Glass | 6457106 | 2021-08-08 12:20:16 -0600 | [diff] [blame] | 46 | CONFIG_SPL_MPC8XXX_INIT_DDR=y |
Tom Rini | 06d06f7 | 2022-05-27 17:13:52 -0400 | [diff] [blame] | 47 | CONFIG_SPL_TARGET="u-boot-with-spl.bin" |
Tom Rini | f852e73 | 2016-04-21 21:37:19 -0400 | [diff] [blame] | 48 | CONFIG_HUSH_PARSER=y |
Adam Ford | 58dbf86 | 2018-02-06 07:58:59 -0600 | [diff] [blame] | 49 | # CONFIG_AUTO_COMPLETE is not set |
Tom Rini | cbfa139 | 2022-05-11 17:38:09 -0400 | [diff] [blame] | 50 | CONFIG_SYS_PBSIZE=276 |
Tuomas Tynkkynen | 28d56bd | 2017-10-08 21:48:01 +0300 | [diff] [blame] | 51 | CONFIG_CMD_IMLS=y |
Tom Rini | faed567 | 2021-08-17 17:59:45 -0400 | [diff] [blame] | 52 | CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=3 |
53 | CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5 | ||||
Tom Rini | 78873cd | 2017-08-14 19:58:53 -0400 | [diff] [blame] | 54 | CONFIG_CMD_I2C=y |
Tom Rini | 1d9ac83 | 2016-04-24 17:29:26 -0400 | [diff] [blame] | 55 | CONFIG_CMD_MMC=y |
Tom Rini | 0f2dcb9 | 2016-04-22 16:41:25 -0400 | [diff] [blame] | 56 | CONFIG_CMD_USB=y |
Tom Rini | 1d9ac83 | 2016-04-24 17:29:26 -0400 | [diff] [blame] | 57 | CONFIG_CMD_MII=y |
Tom Rini | 0f2dcb9 | 2016-04-22 16:41:25 -0400 | [diff] [blame] | 58 | CONFIG_CMD_PING=y |
Simon Glass | 027608e | 2017-05-17 03:25:25 -0600 | [diff] [blame] | 59 | # CONFIG_CMD_HASH is not set |
Tom Rini | 1d9ac83 | 2016-04-24 17:29:26 -0400 | [diff] [blame] | 60 | CONFIG_CMD_EXT2=y |
61 | CONFIG_CMD_FAT=y | ||||
Tom Rini | c20bb73 | 2017-07-22 18:36:16 -0400 | [diff] [blame] | 62 | CONFIG_CMD_MTDPARTS=y |
Tom Rini | 5ad8e11 | 2017-10-22 17:55:07 -0400 | [diff] [blame] | 63 | CONFIG_MTDIDS_DEFAULT="nor0=ec000000.nor" |
64 | CONFIG_MTDPARTS_DEFAULT="mtdparts=ec000000.nor:128k(dtb),6016k(kernel),57088k(fs),1m(vsc7385-firmware),1280k(u-boot)" | ||||
Hou Zhiqiang | 224999f | 2019-08-20 09:35:28 +0000 | [diff] [blame] | 65 | CONFIG_OF_CONTROL=y |
Adam Ford | 710966e | 2020-07-03 06:48:56 -0500 | [diff] [blame] | 66 | CONFIG_ENV_OVERWRITE=y |
Tom Rini | 5b0b040 | 2017-08-28 07:16:32 -0400 | [diff] [blame] | 67 | CONFIG_ENV_IS_IN_MMC=y |
Tom Rini | ca63e71 | 2019-11-12 22:46:36 -0500 | [diff] [blame] | 68 | CONFIG_SYS_RELOC_GD_ENV_ADDR=y |
Tom Rini | 5fb860c | 2022-02-25 11:19:48 -0500 | [diff] [blame] | 69 | CONFIG_USE_BOOTFILE=y |
70 | CONFIG_BOOTFILE="uImage" | ||||
Tom Rini | fe58675 | 2022-03-11 09:12:07 -0500 | [diff] [blame] | 71 | CONFIG_USE_ETHPRIME=y |
72 | CONFIG_ETHPRIME="eTSEC1" | ||||
Tom Rini | 3f00477 | 2022-06-10 22:59:28 -0400 | [diff] [blame] | 73 | CONFIG_LBA48=y |
Tom Rini | f7246c2 | 2021-08-21 13:50:17 -0400 | [diff] [blame] | 74 | CONFIG_DDR_CLK_FREQ=66666666 |
Tom Rini | afba411 | 2022-06-15 12:03:54 -0400 | [diff] [blame] | 75 | CONFIG_SYS_SPD_BUS_NUM=1 |
Tom Rini | 5618460 | 2022-02-25 11:19:53 -0500 | [diff] [blame] | 76 | CONFIG_CHIP_SELECTS_PER_CTRL=2 |
Tom Rini | 8e99f7d | 2022-06-15 12:03:55 -0400 | [diff] [blame] | 77 | CONFIG_SYS_DDR_RAW_TIMING=y |
Tom Rini | f7eed20 | 2021-11-13 18:10:40 -0500 | [diff] [blame] | 78 | CONFIG_SYS_BR0_PRELIM_BOOL=y |
79 | CONFIG_SYS_BR0_PRELIM=0xEC001001 | ||||
80 | CONFIG_SYS_OR0_PRELIM=0xFC000FF7 | ||||
81 | CONFIG_SYS_BR2_PRELIM_BOOL=y | ||||
82 | CONFIG_SYS_BR2_PRELIM=0xFFB00801 | ||||
83 | CONFIG_SYS_OR2_PRELIM=0xFFFE09FF | ||||
84 | CONFIG_SYS_BR3_PRELIM_BOOL=y | ||||
85 | CONFIG_SYS_BR3_PRELIM=0xFFA00801 | ||||
86 | CONFIG_SYS_OR3_PRELIM=0xFFF009F7 | ||||
Tom Rini | f8f6b32 | 2022-05-21 14:44:28 -0400 | [diff] [blame] | 87 | CONFIG_SPL_COMMON_INIT_DDR=y |
Tom Rini | 3eea577 | 2020-05-08 09:08:39 -0400 | [diff] [blame] | 88 | CONFIG_DM_I2C=y |
Tom Rini | 52b2e26 | 2021-08-18 23:12:24 -0400 | [diff] [blame] | 89 | CONFIG_SPL_SYS_I2C_LEGACY=y |
Tom Rini | b1b1307 | 2021-08-18 23:12:37 -0400 | [diff] [blame] | 90 | CONFIG_I2C_SET_DEFAULT_BUS_NUM=y |
Tom Rini | be94c76 | 2021-08-18 23:12:35 -0400 | [diff] [blame] | 91 | CONFIG_SYS_I2C_FSL=y |
92 | CONFIG_SYS_FSL_I2C_OFFSET=0x3000 | ||||
93 | CONFIG_SYS_FSL_HAS_I2C2_OFFSET=y | ||||
94 | CONFIG_SYS_FSL_I2C2_OFFSET=0x3100 | ||||
Tom Rini | faed567 | 2021-08-17 17:59:45 -0400 | [diff] [blame] | 95 | CONFIG_SYS_I2C_EEPROM_ADDR=0x52 |
Mario Six | 41d7d97 | 2018-03-28 14:38:19 +0200 | [diff] [blame] | 96 | CONFIG_FSL_ESDHC=y |
Tom Rini | e799f92 | 2019-12-04 17:18:38 -0500 | [diff] [blame] | 97 | CONFIG_MTD=y |
Adam Ford | 76da1b2 | 2018-10-14 15:10:50 -0500 | [diff] [blame] | 98 | CONFIG_MTD_NOR_FLASH=y |
99 | CONFIG_FLASH_CFI_DRIVER=y | ||||
100 | CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y | ||||
Tom Rini | 302bd67 | 2022-07-23 13:04:55 -0400 | [diff] [blame] | 101 | CONFIG_SYS_FLASH_EMPTY_INFO=y |
Adam Ford | 76da1b2 | 2018-10-14 15:10:50 -0500 | [diff] [blame] | 102 | CONFIG_FLASH_CFI_MTD=y |
103 | CONFIG_SYS_FLASH_CFI=y | ||||
Tom Rini | 2e35d82 | 2022-07-23 13:05:05 -0400 | [diff] [blame] | 104 | CONFIG_SYS_FLASH_QUIET_TEST=y |
Tom Rini | 526e3c8 | 2020-10-05 13:11:41 -0400 | [diff] [blame] | 105 | CONFIG_DM_SPI_FLASH=y |
Patrick Delaunay | 0df8104 | 2019-02-27 15:20:36 +0100 | [diff] [blame] | 106 | CONFIG_SF_DEFAULT_SPEED=10000000 |
Bin Meng | 27f5b19 | 2015-11-25 05:34:54 -0800 | [diff] [blame] | 107 | CONFIG_SPI_FLASH_SPANSION=y |
Tom Rini | 5d15419 | 2020-04-24 15:35:53 -0400 | [diff] [blame] | 108 | CONFIG_PHY_ATHEROS=y |
109 | CONFIG_PHY_BROADCOM=y | ||||
110 | CONFIG_PHY_DAVICOM=y | ||||
111 | CONFIG_PHY_LXT=y | ||||
Mario Six | f504d1a | 2018-04-27 14:52:21 +0200 | [diff] [blame] | 112 | CONFIG_PHY_MARVELL=y |
Tom Rini | 5d15419 | 2020-04-24 15:35:53 -0400 | [diff] [blame] | 113 | CONFIG_PHY_NATSEMI=y |
114 | CONFIG_PHY_REALTEK=y | ||||
115 | CONFIG_PHY_SMSC=y | ||||
116 | CONFIG_PHY_VITESSE=y | ||||
Tom Rini | 526e3c8 | 2020-10-05 13:11:41 -0400 | [diff] [blame] | 117 | CONFIG_PHY_FIXED=y |
Tom Rini | 526e3c8 | 2020-10-05 13:11:41 -0400 | [diff] [blame] | 118 | CONFIG_DM_MDIO=y |
Tom Rini | ca22e96 | 2017-08-07 22:00:34 -0400 | [diff] [blame] | 119 | CONFIG_PHY_GIGE=y |
Simon Glass | 9008a5b | 2015-08-19 09:33:43 -0600 | [diff] [blame] | 120 | CONFIG_E1000=y |
Tom Rini | 527ded8 | 2019-09-23 11:47:37 -0400 | [diff] [blame] | 121 | CONFIG_MII=y |
122 | CONFIG_TSEC_ENET=y | ||||
Hou Zhiqiang | 3885331 | 2019-08-27 11:04:11 +0000 | [diff] [blame] | 123 | CONFIG_PCIE_FSL=y |
Tom Rini | 3eea577 | 2020-05-08 09:08:39 -0400 | [diff] [blame] | 124 | CONFIG_DM_RTC=y |
Thomas Chou | a6cec01 | 2015-11-19 21:48:14 +0800 | [diff] [blame] | 125 | CONFIG_SYS_NS16550=y |
Adam Ford | 4e96ff8 | 2018-04-15 13:51:26 -0400 | [diff] [blame] | 126 | CONFIG_SPI=y |
Tom Rini | 526e3c8 | 2020-10-05 13:11:41 -0400 | [diff] [blame] | 127 | CONFIG_DM_SPI=y |
Bin Meng | 72a049d | 2015-11-25 05:34:53 -0800 | [diff] [blame] | 128 | CONFIG_FSL_ESPI=y |
Tom Rini | 6e9cb11 | 2016-09-08 16:31:26 -0400 | [diff] [blame] | 129 | CONFIG_USB=y |
Tom Rini | d391d8b | 2021-12-11 14:55:51 -0500 | [diff] [blame] | 130 | CONFIG_USB_EHCI_FSL=y |
Tom Rini | 526e3c8 | 2020-10-05 13:11:41 -0400 | [diff] [blame] | 131 | CONFIG_USB_STORAGE=y |