blob: 32d138e648768d6e02c0ae5c4b92065ab08e94b6 [file] [log] [blame]
Marek Vasut15388792024-12-20 01:02:14 +01001// SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
2/*
3 * Copyright (C) 2024 Renesas Electronics Corp.
4 */
5
6#include <asm/io.h>
7#include <dm.h>
8#include <dm/device-internal.h>
9#include <dm/lists.h>
10#include <errno.h>
11#include <hang.h>
12#include <linux/iopoll.h>
13#include <linux/sizes.h>
14#include <malloc.h>
15#include <remoteproc.h>
16
17/* R-Car V4H/V4M contain 3 clusters / 3 cores */
18#define RCAR4_CR52_CORES 3
19
20/* Reset Control Register for Cortex-R52 #n */
21#define APMU_CRRSTCTRL(n) (0x304 + ((n) * 0x40))
22#define APMU_CRRSTCTRL_CR52RST BIT(0)
23
24/* Base Address Register for Cortex-R52 #n */
25#define APMU_CRBARP(n) (0x33c + ((n) * 0x40))
26#define APMU_CRBARP_CR_VLD_BARP BIT(0)
27#define APMU_CRBARP_CR_BAREN_VALID BIT(4)
28#define APMU_CRBARP_CR_RBAR_MASK 0xfffc0000
29#define APMU_CRBARP_CR_RBAR_ALIGN 0x40000
30
31/**
32 * struct renesas_apmu_rproc_privdata - remote processor private data
33 * @regs: controller registers
34 * @core_id: CPU core id
35 * @trampoline: jump trampoline code
36 */
37struct renesas_apmu_rproc_privdata {
38 void __iomem *regs;
39 ulong core_id;
40 u32 *trampoline;
41};
42
43/*
44 * CRBARP address is aligned to 0x40000 / 256 kiB , this trampoline
45 * allows arbitrary address alignment at instruction granularity.
46 */
47static const u32 renesas_apmu_rproc_trampoline[4] = {
48 0xe59f0004, /* ldr r0, [pc, #4] */
49 0xe1a0f000, /* mov pc, r0 */
50 0xeafffffe, /* 1: b 1b */
51 0xabcd1234 /* jump target (rewritten on load) */
52};
53
54/**
55 * renesas_apmu_rproc_load() - Load the remote processor
56 * @dev: corresponding remote processor device
57 * @addr: Address in memory where image is stored
58 * @size: Size in bytes of the image
59 *
60 * Return: 0 if all went ok, else corresponding -ve error
61 */
62static int renesas_apmu_rproc_load(struct udevice *dev, ulong addr, ulong size)
63{
64 struct renesas_apmu_rproc_privdata *priv = dev_get_priv(dev);
65 u32 trampolineaddr = (u32)(uintptr_t)(priv->trampoline);
66
67 priv->trampoline[3] = addr;
68 flush_dcache_range(trampolineaddr,
69 trampolineaddr +
70 sizeof(renesas_apmu_rproc_trampoline));
71
72 /* CR52 boot address set */
73 writel(trampolineaddr | APMU_CRBARP_CR_VLD_BARP,
74 priv->regs + APMU_CRBARP(priv->core_id));
75 writel(trampolineaddr | APMU_CRBARP_CR_VLD_BARP | APMU_CRBARP_CR_BAREN_VALID,
76 priv->regs + APMU_CRBARP(priv->core_id));
77
78 return 0;
79}
80
81/**
82 * renesas_apmu_rproc_start() - Start the remote processor
83 * @dev: corresponding remote processor device
84 *
85 * Return: 0 if all went ok, else corresponding -ve error
86 */
87static int renesas_apmu_rproc_start(struct udevice *dev)
88{
89 struct renesas_apmu_rproc_privdata *priv = dev_get_priv(dev);
90
91 /* Clear APMU_CRRSTCTRL_CR52RST, the only bit in this register */
92 writel(0, priv->regs + APMU_CRRSTCTRL(priv->core_id));
93
94 return 0;
95}
96
97/**
98 * renesas_apmu_rproc_stop() - Stop the remote processor
99 * @dev: corresponding remote processor device
100 *
101 * Return: 0 if all went ok, else corresponding -ve error
102 */
103static int renesas_apmu_rproc_stop(struct udevice *dev)
104{
105 struct renesas_apmu_rproc_privdata *priv = dev_get_priv(dev);
106
107 /* Set APMU_CRRSTCTRL_CR52RST, the only bit in this register */
108 writel(APMU_CRRSTCTRL_CR52RST,
109 priv->regs + APMU_CRRSTCTRL(priv->core_id));
110
111 return 0;
112}
113
114/**
115 * renesas_apmu_rproc_reset() - Reset the remote processor
116 * @dev: corresponding remote processor device
117 *
118 * Return: 0 if all went ok, else corresponding -ve error
119 */
120static int renesas_apmu_rproc_reset(struct udevice *dev)
121{
122 renesas_apmu_rproc_stop(dev);
123 renesas_apmu_rproc_start(dev);
124 return 0;
125}
126
127/**
128 * renesas_apmu_rproc_is_running() - Is the remote processor running
129 * @dev: corresponding remote processor device
130 *
131 * Return: 0 if the remote processor is running, 1 otherwise
132 */
133static int renesas_apmu_rproc_is_running(struct udevice *dev)
134{
135 struct renesas_apmu_rproc_privdata *priv = dev_get_priv(dev);
136
137 return readl(priv->regs + APMU_CRRSTCTRL(priv->core_id)) &
138 APMU_CRRSTCTRL_CR52RST;
139}
140
141/**
142 * renesas_apmu_rproc_init() - Initialize the remote processor CRBAR registers
143 * @dev: corresponding remote processor device
144 *
145 * Return: 0 if all went ok, else corresponding -ve error
146 */
147static int renesas_apmu_rproc_init(struct udevice *dev)
148{
149 struct renesas_apmu_rproc_privdata *priv = dev_get_priv(dev);
150
151 /* If the core is running already, do nothing. */
152 if (renesas_apmu_rproc_is_running(dev))
153 return 0;
154
155 /* Clear and invalidate CRBARP content */
156 writel(0, priv->regs + APMU_CRBARP(priv->core_id));
157
158 return 0;
159}
160
161/**
162 * renesas_apmu_rproc_device_to_virt() - Convert device address to virtual address
163 * @dev: corresponding remote processor device
164 * @da: device address
165 * @size: Size of the memory region @da is pointing to
166 *
167 * Return: converted virtual address
168 */
169static void *renesas_apmu_rproc_device_to_virt(struct udevice *dev, ulong da,
170 ulong size)
171{
172 /*
173 * The Cortex R52 and A76 share the same address space,
174 * this operation is a no-op.
175 */
176 return (void *)da;
177}
178
179static const struct dm_rproc_ops renesas_apmu_rproc_ops = {
180 .init = renesas_apmu_rproc_init,
181 .load = renesas_apmu_rproc_load,
182 .start = renesas_apmu_rproc_start,
183 .stop = renesas_apmu_rproc_stop,
184 .reset = renesas_apmu_rproc_reset,
185 .is_running = renesas_apmu_rproc_is_running,
186 .device_to_virt = renesas_apmu_rproc_device_to_virt,
187};
188
189/**
190 * renesas_apmu_rproc_of_to_plat() - Convert OF data to platform data
191 * @dev: corresponding remote processor device
192 *
193 * Return: 0 if all went ok, else corresponding -ve error
194 */
195static int renesas_apmu_rproc_of_to_plat(struct udevice *dev)
196{
197 struct renesas_apmu_rproc_privdata *priv = dev_get_priv(dev);
198
199 priv->core_id = dev_get_driver_data(dev);
200
201 priv->regs = dev_read_addr_ptr(dev);
202 if (!priv->regs)
203 return -EINVAL;
204
205 priv->trampoline = memalign(APMU_CRBARP_CR_RBAR_ALIGN,
206 sizeof(renesas_apmu_rproc_trampoline));
207 if (!priv->trampoline)
208 return -ENOMEM;
209
210 memcpy(priv->trampoline, renesas_apmu_rproc_trampoline,
211 sizeof(renesas_apmu_rproc_trampoline));
212
213 return 0;
214}
215
216U_BOOT_DRIVER(renesas_apmu_cr52) = {
217 .name = "rcar-apmu-cr52",
218 .id = UCLASS_REMOTEPROC,
219 .ops = &renesas_apmu_rproc_ops,
220 .of_to_plat = renesas_apmu_rproc_of_to_plat,
221 .priv_auto = sizeof(struct renesas_apmu_rproc_privdata),
222};
223
224/**
225 * renesas_apmu_rproc_bind() - Bind rproc driver to each core control
226 * @dev: corresponding remote processor parent device
227 *
228 * Return: 0 if all went ok, else corresponding -ve error
229 */
230static int renesas_apmu_rproc_bind(struct udevice *parent)
231{
232 const ulong cr52cores = RCAR4_CR52_CORES;
233 ofnode pnode = dev_ofnode(parent);
234 struct udevice *cdev;
235 struct driver *cdrv;
236 char name[32];
237 ulong i;
238 int ret;
239
240 cdrv = lists_driver_lookup_name("rcar-apmu-cr52");
241 if (!cdrv)
242 return -ENOENT;
243
244 for (i = 0; i < cr52cores; i++) {
245 snprintf(name, sizeof(name), "rcar-apmu-cr52.%ld", i);
246 ret = device_bind_with_driver_data(parent, cdrv, strdup(name),
247 i, pnode, &cdev);
248 if (ret)
249 return ret;
250 }
251
252 return 0;
253}
254
255static const struct udevice_id renesas_apmu_rproc_ids[] = {
256 { .compatible = "renesas,r8a779g0-cr52" },
257 { .compatible = "renesas,r8a779h0-cr52" },
258 { }
259};
260
261U_BOOT_DRIVER(renesas_apmu_rproc) = {
262 .name = "rcar-apmu-rproc",
263 .of_match = renesas_apmu_rproc_ids,
264 .id = UCLASS_NOP,
265 .bind = renesas_apmu_rproc_bind,
266};