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Tom Rini10e47792018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Vipin KUMAR7cb16352010-01-15 19:15:43 +05302/*
3 * (C) Copyright 2009
4 * Vipin Kumar, ST Micoelectronics, vipin.kumar@st.com.
Vipin KUMAR7cb16352010-01-15 19:15:43 +05305 */
6
7#include <common.h>
Simon Glass495a5dc2019-11-14 12:57:30 -07008#include <time.h>
Vipin KUMAR7cb16352010-01-15 19:15:43 +05309#include <asm/io.h>
10#include <asm/arch/hardware.h>
11#include <asm/arch/spr_gpt.h>
12#include <asm/arch/spr_misc.h>
13
14#define GPT_RESOLUTION (CONFIG_SPEAR_HZ_CLOCK / CONFIG_SPEAR_HZ)
15#define READ_TIMER() (readl(&gpt_regs_p->count) & GPT_FREE_RUNNING)
16
17static struct gpt_regs *const gpt_regs_p =
18 (struct gpt_regs *)CONFIG_SPEAR_TIMERBASE;
19
20static struct misc_regs *const misc_regs_p =
21 (struct misc_regs *)CONFIG_SPEAR_MISCBASE;
22
Heiko Schocher5504dab2011-01-20 22:56:39 +000023DECLARE_GLOBAL_DATA_PTR;
24
Patrick Delaunay9858a602018-10-05 11:33:52 +020025static ulong get_timer_masked(void);
26
Simon Glass2655ee12012-12-13 20:48:34 +000027#define timestamp gd->arch.tbl
Simon Glassa848da52012-12-13 20:48:35 +000028#define lastdec gd->arch.lastinc
Vipin KUMAR7cb16352010-01-15 19:15:43 +053029
30int timer_init(void)
31{
32 u32 synth;
33
34 /* Prescaler setting */
35#if defined(CONFIG_SPEAR3XX)
36 writel(MISC_PRSC_CFG, &misc_regs_p->prsc2_clk_cfg);
37 synth = MISC_GPT4SYNTH;
38#elif defined(CONFIG_SPEAR600)
39 writel(MISC_PRSC_CFG, &misc_regs_p->prsc1_clk_cfg);
40 synth = MISC_GPT3SYNTH;
41#else
Simon Glass167ad902016-09-12 23:18:30 -060042# error Incorrect config. Can only be SPEAR{600|300|310|320}
Vipin KUMAR7cb16352010-01-15 19:15:43 +053043#endif
44
45 writel(readl(&misc_regs_p->periph_clk_cfg) | synth,
46 &misc_regs_p->periph_clk_cfg);
47
48 /* disable timers */
49 writel(GPT_PRESCALER_1 | GPT_MODE_AUTO_RELOAD, &gpt_regs_p->control);
50
51 /* load value for free running */
52 writel(GPT_FREE_RUNNING, &gpt_regs_p->compare);
53
54 /* auto reload, start timer */
55 writel(readl(&gpt_regs_p->control) | GPT_ENABLE, &gpt_regs_p->control);
56
Graeme Russ944a7fe2011-07-15 02:21:14 +000057 /* Reset the timer */
58 lastdec = READ_TIMER();
59 timestamp = 0;
Vipin KUMAR7cb16352010-01-15 19:15:43 +053060
61 return 0;
62}
63
64/*
65 * timer without interrupts
66 */
Vipin KUMAR7cb16352010-01-15 19:15:43 +053067ulong get_timer(ulong base)
68{
69 return (get_timer_masked() / GPT_RESOLUTION) - base;
70}
71
Vipin KUMAR7cb16352010-01-15 19:15:43 +053072void __udelay(unsigned long usec)
73{
74 ulong tmo;
75 ulong start = get_timer_masked();
76 ulong tenudelcnt = CONFIG_SPEAR_HZ_CLOCK / (1000 * 100);
77 ulong rndoff;
78
79 rndoff = (usec % 10) ? 1 : 0;
80
81 /* tenudelcnt timer tick gives 10 microsecconds delay */
82 tmo = ((usec / 10) + rndoff) * tenudelcnt;
83
84 while ((ulong) (get_timer_masked() - start) < tmo)
85 ;
86}
87
Patrick Delaunay9858a602018-10-05 11:33:52 +020088static ulong get_timer_masked(void)
Vipin KUMAR7cb16352010-01-15 19:15:43 +053089{
90 ulong now = READ_TIMER();
91
92 if (now >= lastdec) {
93 /* normal mode */
94 timestamp += now - lastdec;
95 } else {
96 /* we have an overflow ... */
97 timestamp += now + GPT_FREE_RUNNING - lastdec;
98 }
99 lastdec = now;
100
101 return timestamp;
102}
103
Vipin KUMAR7cb16352010-01-15 19:15:43 +0530104/*
105 * This function is derived from PowerPC code (read timebase as long long).
106 * On ARM it just returns the timer value.
107 */
108unsigned long long get_ticks(void)
109{
110 return get_timer(0);
111}
112
113/*
114 * This function is derived from PowerPC code (timebase clock frequency).
115 * On ARM it returns the number of timer ticks per second.
116 */
117ulong get_tbclk(void)
118{
119 return CONFIG_SPEAR_HZ;
120}