blob: 8b3410399b4f4ea6abc26d59e357498353b2cc81 [file] [log] [blame]
wdenkabda5ca2003-05-31 18:35:21 +00001/*
2 * (C) Copyright 2002
3 * Daniel Engström, Omicron Ceti AB <daniel@omicron.se>.
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 */
23
24/* now setup the General purpose bus to give us access to the LEDs.
25 * We can then use the leds to display status information.
wdenk57b2d802003-06-27 21:31:46 +000026 */
wdenkabda5ca2003-05-31 18:35:21 +000027
28sc520_cdp_registers:
29/* size offset value */
30.word 1 ; .word 0x040 ; .long 0x00 /* SDRAM buffer control */
31.word 2 ; .word 0xc08 ; .long 0x0001 /* GP CS offset */
32.word 2 ; .word 0xc09 ; .long 0x0003 /* GP CS width */
33.word 2 ; .word 0xc0a ; .long 0x0001 /* GP CS width */
34.word 2 ; .word 0xc0b ; .long 0x0003 /* GP RD pulse width */
35.word 2 ; .word 0xc0c ; .long 0x0001 /* GP RD offse */
36.word 2 ; .word 0xc0d ; .long 0x0003 /* GP WR pulse width */
37.word 2 ; .word 0xc0e ; .long 0x0001 /* GP WR offset */
38.word 2 ; .word 0xc2c ; .long 0x003f /* GPIO directionreg 31-16 */
39.word 2 ; .word 0xc2a ; .long 0xe000 /* GPIO directionreg 15-0 */
40.word 2 ; .word 0xc22 ; .long 0xffc0 /* GPIO pin function 31-16 reg */
41.word 2 ; .word 0xc20 ; .long 0x1fff /* GPIO pin function 15-0 reg */
42.word 0 ; .word 0x000 ; .long 0x00
43
44/* board early intialization */
45.globl early_board_init
46early_board_init:
wdenk57b2d802003-06-27 21:31:46 +000047 movl $sc520_cdp_registers,%esi
48init_loop:
49 movl $0xfffef000,%edi /* MMCR base to edi */
wdenkabda5ca2003-05-31 18:35:21 +000050 movw (%esi), %bx /* load size to bx */
51 cmpw $0, %bx /* if size is 0 we're done */
wdenk57b2d802003-06-27 21:31:46 +000052 je done
wdenkabda5ca2003-05-31 18:35:21 +000053 xorl %edx,%edx
54 movw 2(%esi), %dx /* load MMCR offset to dx */
55 addl %edx, %edi /* add offset to base in edi */
56 movl 4(%esi), %eax /* load value in eax */
57 cmpw $1, %bx
58 je byte /* byte op? */
59 cmpw $2, %bx
60 je word /* word op? */
61 movl %eax, (%edi) /* must be long, then */
62 jmp next
wdenk57b2d802003-06-27 21:31:46 +000063byte: movb %al,(%edi)
wdenkabda5ca2003-05-31 18:35:21 +000064 jmp next
65word: movw %ax,(%edi)
66next: addl $8, %esi /* advance esi */
67 jmp init_loop
68
69 /* light all leds */
wdenk57b2d802003-06-27 21:31:46 +000070done: movl $0xfffefc32,%edx
71 movw $0000,(%edx)
wdenkabda5ca2003-05-31 18:35:21 +000072
73 jmp *%ebp /* return to caller */
74
75
76.globl __show_boot_progress
77__show_boot_progress:
wdenk57b2d802003-06-27 21:31:46 +000078 movl $0xfffefc32,%edx
79 xorw $0xffff, %ax
80 movw %ax,(%edx)
wdenkabda5ca2003-05-31 18:35:21 +000081 jmp *%ebp