blob: fd78ad60d14beee4aec3beaf1989bbe0d65f0e11 [file] [log] [blame]
Vasily Khoruzhickda2f45a2019-11-09 11:24:50 -08001// SPDX-License-Identifier: GPL-2.0+
2/*
3 * (C) Copyright 2019 Vasily Khoruzhick <anarsoul@gmail.com>
4 */
5
6#include <common.h>
7#include <dm.h>
Simon Glass97589732020-05-10 11:40:02 -06008#include <init.h>
Vasily Khoruzhickda2f45a2019-11-09 11:24:50 -08009#include <syscon.h>
Vasily Khoruzhickda2f45a2019-11-09 11:24:50 -080010#include <asm/arch-rockchip/clock.h>
11#include <asm/arch-rockchip/grf_rk3399.h>
12#include <asm/arch-rockchip/hardware.h>
Vasily Khoruzhickda2f45a2019-11-09 11:24:50 -080013
14#define GRF_IO_VSEL_BT565_SHIFT 0
15#define PMUGRF_CON0_VSEL_SHIFT 8
16
17#ifdef CONFIG_MISC_INIT_R
18static void setup_iodomain(void)
19{
20 struct rk3399_grf_regs *grf =
21 syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
22 struct rk3399_pmugrf_regs *pmugrf =
23 syscon_get_first_range(ROCKCHIP_SYSCON_PMUGRF);
24
25 /* BT565 is in 1.8v domain */
26 rk_setreg(&grf->io_vsel, 1 << GRF_IO_VSEL_BT565_SHIFT);
27
28 /* Set GPIO1 1.8v/3.0v source select to PMU1830_VOL */
29 rk_setreg(&pmugrf->soc_con0, 1 << PMUGRF_CON0_VSEL_SHIFT);
30}
31
Quentin Schulz2760b162024-03-11 13:01:49 +010032int rockchip_early_misc_init_r(void)
Vasily Khoruzhickda2f45a2019-11-09 11:24:50 -080033{
Vasily Khoruzhickda2f45a2019-11-09 11:24:50 -080034 setup_iodomain();
35
Quentin Schulz2760b162024-03-11 13:01:49 +010036 return 0;
Vasily Khoruzhickda2f45a2019-11-09 11:24:50 -080037}
38
39#endif