Vasily Khoruzhick | da2f45a | 2019-11-09 11:24:50 -0800 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0+ |
| 2 | /* |
| 3 | * (C) Copyright 2019 Vasily Khoruzhick <anarsoul@gmail.com> |
| 4 | */ |
| 5 | |
| 6 | #include <common.h> |
| 7 | #include <dm.h> |
Simon Glass | 9758973 | 2020-05-10 11:40:02 -0600 | [diff] [blame] | 8 | #include <init.h> |
Vasily Khoruzhick | da2f45a | 2019-11-09 11:24:50 -0800 | [diff] [blame] | 9 | #include <syscon.h> |
Vasily Khoruzhick | da2f45a | 2019-11-09 11:24:50 -0800 | [diff] [blame] | 10 | #include <asm/arch-rockchip/clock.h> |
| 11 | #include <asm/arch-rockchip/grf_rk3399.h> |
| 12 | #include <asm/arch-rockchip/hardware.h> |
Vasily Khoruzhick | da2f45a | 2019-11-09 11:24:50 -0800 | [diff] [blame] | 13 | |
| 14 | #define GRF_IO_VSEL_BT565_SHIFT 0 |
| 15 | #define PMUGRF_CON0_VSEL_SHIFT 8 |
| 16 | |
| 17 | #ifdef CONFIG_MISC_INIT_R |
| 18 | static void setup_iodomain(void) |
| 19 | { |
| 20 | struct rk3399_grf_regs *grf = |
| 21 | syscon_get_first_range(ROCKCHIP_SYSCON_GRF); |
| 22 | struct rk3399_pmugrf_regs *pmugrf = |
| 23 | syscon_get_first_range(ROCKCHIP_SYSCON_PMUGRF); |
| 24 | |
| 25 | /* BT565 is in 1.8v domain */ |
| 26 | rk_setreg(&grf->io_vsel, 1 << GRF_IO_VSEL_BT565_SHIFT); |
| 27 | |
| 28 | /* Set GPIO1 1.8v/3.0v source select to PMU1830_VOL */ |
| 29 | rk_setreg(&pmugrf->soc_con0, 1 << PMUGRF_CON0_VSEL_SHIFT); |
| 30 | } |
| 31 | |
Quentin Schulz | 2760b16 | 2024-03-11 13:01:49 +0100 | [diff] [blame] | 32 | int rockchip_early_misc_init_r(void) |
Vasily Khoruzhick | da2f45a | 2019-11-09 11:24:50 -0800 | [diff] [blame] | 33 | { |
Vasily Khoruzhick | da2f45a | 2019-11-09 11:24:50 -0800 | [diff] [blame] | 34 | setup_iodomain(); |
| 35 | |
Quentin Schulz | 2760b16 | 2024-03-11 13:01:49 +0100 | [diff] [blame] | 36 | return 0; |
Vasily Khoruzhick | da2f45a | 2019-11-09 11:24:50 -0800 | [diff] [blame] | 37 | } |
| 38 | |
| 39 | #endif |