blob: c58545be04b6d7b76fc3ef4a54528db9f918ef44 [file] [log] [blame]
developerf4a079c2018-11-15 10:07:52 +08001/* SPDX-License-Identifier: GPL-2.0 */
2/*
3 * Configuration for MediaTek MT7629 SoC
4 *
5 * Copyright (C) 2018 MediaTek Inc.
6 * Author: Ryder Lee <ryder.lee@mediatek.com>
7 */
8
9#ifndef __MT7629_H
10#define __MT7629_H
11
12#include <linux/sizes.h>
13
14/* Miscellaneous configurable options */
developerf4a079c2018-11-15 10:07:52 +080015
16#define CONFIG_SYS_MAXARGS 8
17#define CONFIG_SYS_BOOTM_LEN SZ_64M
18#define CONFIG_SYS_CBSIZE SZ_1K
19#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
20 sizeof(CONFIG_SYS_PROMPT) + 16)
21
developerb8de3ee2018-12-20 16:12:57 +080022#define CONFIG_SYS_NONCACHED_MEMORY SZ_1M
developerf4a079c2018-11-15 10:07:52 +080023
24/* Environment */
developerf4a079c2018-11-15 10:07:52 +080025
26/* Defines for SPL */
27#define CONFIG_SPL_STACK 0x106000
developerf4a079c2018-11-15 10:07:52 +080028#define CONFIG_SPL_MAX_SIZE SZ_64K
29#define CONFIG_SPL_MAX_FOOTPRINT SZ_64K
30#define CONFIG_SPL_PAD_TO 0x10000
31
32#define CONFIG_SPI_ADDR 0x30000000
developerf4a079c2018-11-15 10:07:52 +080033#define CONFIG_SYS_UBOOT_BASE (CONFIG_SPI_ADDR + CONFIG_SPL_PAD_TO)
34
35/* SPL -> Uboot */
developerf4a079c2018-11-15 10:07:52 +080036#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_TEXT_BASE + SZ_2M - \
37 GENERATED_GBL_DATA_SIZE)
38
39/* UBoot -> Kernel */
40#define CONFIG_SYS_SPL_ARGS_ADDR 0x40000000
developerf4a079c2018-11-15 10:07:52 +080041
42/* DRAM */
43#define CONFIG_SYS_SDRAM_BASE 0x40000000
44
developerb8de3ee2018-12-20 16:12:57 +080045/* Ethernet */
46#define CONFIG_IPADDR 192.168.1.1
47#define CONFIG_SERVERIP 192.168.1.2
48
developerf4a079c2018-11-15 10:07:52 +080049#endif