blob: 4f8da5940431f5a8747bf0aa1f445a756ed4d6f3 [file] [log] [blame]
Tom Rini10e47792018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0 */
masakazu.mochizuki.wd@hitachi.com9d0e9372016-04-12 17:11:41 +09002/*
3 * include/configs/blanche.h
4 * This file is blanche board configuration.
5 *
6 * Copyright (C) 2016 Renesas Electronics Corporation
masakazu.mochizuki.wd@hitachi.com9d0e9372016-04-12 17:11:41 +09007 */
8
9#ifndef __BLANCHE_H
10#define __BLANCHE_H
11
masakazu.mochizuki.wd@hitachi.com9d0e9372016-04-12 17:11:41 +090012#include "rcar-gen2-common.h"
13
masakazu.mochizuki.wd@hitachi.com9d0e9372016-04-12 17:11:41 +090014/* STACK */
Marek Vasut927b1e32018-04-30 14:10:36 +020015#define CONFIG_SYS_INIT_SP_ADDR 0x4f000000
16#define STACK_AREA_SIZE 0x00100000
17#define LOW_LEVEL_MERAM_STACK \
masakazu.mochizuki.wd@hitachi.com9d0e9372016-04-12 17:11:41 +090018 (CONFIG_SYS_INIT_SP_ADDR + STACK_AREA_SIZE - 4)
19
20/* MEMORY */
21#define RCAR_GEN2_SDRAM_BASE 0x40000000
22#define RCAR_GEN2_SDRAM_SIZE (1024u * 1024 * 1024)
23#define RCAR_GEN2_UBOOT_SDRAM_SIZE (512 * 1024 * 1024)
24
masakazu.mochizuki.wd@hitachi.com9d0e9372016-04-12 17:11:41 +090025#undef CONFIG_SYS_LOADS_BAUD_CHANGE
26
27/* FLASH */
Masahiro Yamada8cea9b52017-02-11 22:43:54 +090028#if !defined(CONFIG_MTD_NOR_FLASH)
masakazu.mochizuki.wd@hitachi.com9d0e9372016-04-12 17:11:41 +090029#define CONFIG_SH_QSPI_BASE 0xE6B10000
30#else
masakazu.mochizuki.wd@hitachi.com9d0e9372016-04-12 17:11:41 +090031#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT
masakazu.mochizuki.wd@hitachi.com9d0e9372016-04-12 17:11:41 +090032#define CONFIG_FLASH_SHOW_PROGRESS 45
33#define CONFIG_SYS_FLASH_BASE 0x00000000
34#define CONFIG_SYS_FLASH_SIZE 0x04000000 /* 64 MB */
35#define CONFIG_SYS_MAX_FLASH_SECT 1024
masakazu.mochizuki.wd@hitachi.com9d0e9372016-04-12 17:11:41 +090036#define CONFIG_SYS_FLASH_BANKS_LIST { (CONFIG_SYS_FLASH_BASE) }
37#define CONFIG_SYS_FLASH_BANKS_SIZES { (CONFIG_SYS_FLASH_SIZE) }
38
39#define CONFIG_SYS_FLASH_ERASE_TOUT 3000
40#define CONFIG_SYS_FLASH_WRITE_TOUT 3000
41#define CONFIG_SYS_FLASH_LOCK_TOUT 3000
42#define CONFIG_SYS_FLASH_UNLOCK_TOUT 3000
masakazu.mochizuki.wd@hitachi.com9d0e9372016-04-12 17:11:41 +090043#endif
44
masakazu.mochizuki.wd@hitachi.com9d0e9372016-04-12 17:11:41 +090045/* Board Clock */
masakazu.mochizuki.wd@hitachi.com9d0e9372016-04-12 17:11:41 +090046
47/* ENV setting */
masakazu.mochizuki.wd@hitachi.com9d0e9372016-04-12 17:11:41 +090048
masakazu.mochizuki.wd@hitachi.com9d0e9372016-04-12 17:11:41 +090049#endif /* __BLANCHE_H */