wdenk | 4a9cbbe | 2002-08-27 09:48:53 +0000 | [diff] [blame] | 1 | /* |
| 2 | * (C) Copyright 2000, 2001 |
| 3 | * Rich Ireland, Enterasys Networks, rireland@enterasys.com. |
| 4 | * |
| 5 | * See file CREDITS for list of people who contributed to this |
| 6 | * project. |
| 7 | * |
| 8 | * This program is free software; you can redistribute it and/or |
| 9 | * modify it under the terms of the GNU General Public License as |
| 10 | * published by the Free Software Foundation; either version 2 of |
| 11 | * the License, or (at your option) any later version. |
| 12 | * |
| 13 | * This program is distributed in the hope that it will be useful, |
| 14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 16 | * GNU General Public License for more details. |
| 17 | * |
| 18 | * You should have received a copy of the GNU General Public License |
| 19 | * along with this program; if not, write to the Free Software |
| 20 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
| 21 | * MA 02111-1307 USA |
| 22 | * |
| 23 | */ |
| 24 | |
| 25 | /* |
| 26 | * FPGA support |
| 27 | */ |
| 28 | #include <common.h> |
| 29 | #include <command.h> |
wdenk | 57b2d80 | 2003-06-27 21:31:46 +0000 | [diff] [blame] | 30 | #include <fpga.h> |
wdenk | 525d7b6 | 2005-01-22 18:13:04 +0000 | [diff] [blame] | 31 | #include <malloc.h> |
wdenk | 4a9cbbe | 2002-08-27 09:48:53 +0000 | [diff] [blame] | 32 | |
wdenk | 4a9cbbe | 2002-08-27 09:48:53 +0000 | [diff] [blame] | 33 | /* Local functions */ |
Michal Simek | a888af7 | 2013-04-26 13:10:07 +0200 | [diff] [blame] | 34 | static int fpga_get_op(char *opstr); |
wdenk | 4a9cbbe | 2002-08-27 09:48:53 +0000 | [diff] [blame] | 35 | |
| 36 | /* Local defines */ |
| 37 | #define FPGA_NONE -1 |
| 38 | #define FPGA_INFO 0 |
| 39 | #define FPGA_LOAD 1 |
wdenk | 310b4fc | 2005-01-09 18:12:51 +0000 | [diff] [blame] | 40 | #define FPGA_LOADB 2 |
wdenk | 4a9cbbe | 2002-08-27 09:48:53 +0000 | [diff] [blame] | 41 | #define FPGA_DUMP 3 |
Stefan Roese | 5f1cf2d | 2006-08-15 14:15:51 +0200 | [diff] [blame] | 42 | #define FPGA_LOADMK 4 |
wdenk | 4a9cbbe | 2002-08-27 09:48:53 +0000 | [diff] [blame] | 43 | |
| 44 | /* ------------------------------------------------------------------------- */ |
| 45 | /* command form: |
| 46 | * fpga <op> <device number> <data addr> <datasize> |
| 47 | * where op is 'load', 'dump', or 'info' |
| 48 | * If there is no device number field, the fpga environment variable is used. |
| 49 | * If there is no data addr field, the fpgadata environment variable is used. |
| 50 | * The info command requires no data address field. |
| 51 | */ |
Michal Simek | a888af7 | 2013-04-26 13:10:07 +0200 | [diff] [blame] | 52 | int do_fpga(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[]) |
wdenk | 4a9cbbe | 2002-08-27 09:48:53 +0000 | [diff] [blame] | 53 | { |
wdenk | 1ebf41e | 2004-01-02 14:00:00 +0000 | [diff] [blame] | 54 | int op, dev = FPGA_INVALID_DEVICE; |
| 55 | size_t data_size = 0; |
| 56 | void *fpga_data = NULL; |
Michal Simek | a888af7 | 2013-04-26 13:10:07 +0200 | [diff] [blame] | 57 | char *devstr = getenv("fpga"); |
| 58 | char *datastr = getenv("fpgadata"); |
wdenk | 1ebf41e | 2004-01-02 14:00:00 +0000 | [diff] [blame] | 59 | int rc = FPGA_FAIL; |
Stefano Babic | 67d7f56 | 2010-10-19 09:22:52 +0200 | [diff] [blame] | 60 | int wrong_parms = 0; |
Michal Simek | a888af7 | 2013-04-26 13:10:07 +0200 | [diff] [blame] | 61 | #if defined(CONFIG_FIT) |
Marian Balakowicz | d79162d | 2008-03-12 10:33:01 +0100 | [diff] [blame] | 62 | const char *fit_uname = NULL; |
| 63 | ulong fit_addr; |
| 64 | #endif |
wdenk | 4a9cbbe | 2002-08-27 09:48:53 +0000 | [diff] [blame] | 65 | |
wdenk | 1ebf41e | 2004-01-02 14:00:00 +0000 | [diff] [blame] | 66 | if (devstr) |
Michal Simek | a888af7 | 2013-04-26 13:10:07 +0200 | [diff] [blame] | 67 | dev = (int) simple_strtoul(devstr, NULL, 16); |
wdenk | 1ebf41e | 2004-01-02 14:00:00 +0000 | [diff] [blame] | 68 | if (datastr) |
Michal Simek | a888af7 | 2013-04-26 13:10:07 +0200 | [diff] [blame] | 69 | fpga_data = (void *)simple_strtoul(datastr, NULL, 16); |
wdenk | 4a9cbbe | 2002-08-27 09:48:53 +0000 | [diff] [blame] | 70 | |
wdenk | 1ebf41e | 2004-01-02 14:00:00 +0000 | [diff] [blame] | 71 | switch (argc) { |
| 72 | case 5: /* fpga <op> <dev> <data> <datasize> */ |
Michal Simek | a888af7 | 2013-04-26 13:10:07 +0200 | [diff] [blame] | 73 | data_size = simple_strtoul(argv[4], NULL, 16); |
Marian Balakowicz | d79162d | 2008-03-12 10:33:01 +0100 | [diff] [blame] | 74 | |
wdenk | 1ebf41e | 2004-01-02 14:00:00 +0000 | [diff] [blame] | 75 | case 4: /* fpga <op> <dev> <data> */ |
Marian Balakowicz | d79162d | 2008-03-12 10:33:01 +0100 | [diff] [blame] | 76 | #if defined(CONFIG_FIT) |
Michal Simek | a888af7 | 2013-04-26 13:10:07 +0200 | [diff] [blame] | 77 | if (fit_parse_subimage(argv[3], (ulong)fpga_data, |
| 78 | &fit_addr, &fit_uname)) { |
Marian Balakowicz | d79162d | 2008-03-12 10:33:01 +0100 | [diff] [blame] | 79 | fpga_data = (void *)fit_addr; |
Michal Simek | a888af7 | 2013-04-26 13:10:07 +0200 | [diff] [blame] | 80 | debug("* fpga: subimage '%s' from FIT image ", |
| 81 | fit_uname); |
| 82 | debug("at 0x%08lx\n", fit_addr); |
Marian Balakowicz | d79162d | 2008-03-12 10:33:01 +0100 | [diff] [blame] | 83 | } else |
| 84 | #endif |
| 85 | { |
Michal Simek | a888af7 | 2013-04-26 13:10:07 +0200 | [diff] [blame] | 86 | fpga_data = (void *)simple_strtoul(argv[3], NULL, 16); |
Stefano Babic | b69b9a5 | 2011-12-28 06:47:01 +0000 | [diff] [blame] | 87 | debug("* fpga: cmdline image address = 0x%08lx\n", |
Michal Simek | a888af7 | 2013-04-26 13:10:07 +0200 | [diff] [blame] | 88 | (ulong)fpga_data); |
Marian Balakowicz | d79162d | 2008-03-12 10:33:01 +0100 | [diff] [blame] | 89 | } |
Michal Simek | a888af7 | 2013-04-26 13:10:07 +0200 | [diff] [blame] | 90 | debug("%s: fpga_data = 0x%x\n", __func__, (uint)fpga_data); |
Marian Balakowicz | d79162d | 2008-03-12 10:33:01 +0100 | [diff] [blame] | 91 | |
wdenk | 1ebf41e | 2004-01-02 14:00:00 +0000 | [diff] [blame] | 92 | case 3: /* fpga <op> <dev | data addr> */ |
Michal Simek | a888af7 | 2013-04-26 13:10:07 +0200 | [diff] [blame] | 93 | dev = (int)simple_strtoul(argv[2], NULL, 16); |
Stefano Babic | b69b9a5 | 2011-12-28 06:47:01 +0000 | [diff] [blame] | 94 | debug("%s: device = %d\n", __func__, dev); |
wdenk | 1ebf41e | 2004-01-02 14:00:00 +0000 | [diff] [blame] | 95 | /* FIXME - this is a really weak test */ |
Michal Simek | a888af7 | 2013-04-26 13:10:07 +0200 | [diff] [blame] | 96 | if ((argc == 3) && (dev > fpga_count())) { |
| 97 | /* must be buffer ptr */ |
Stefano Babic | b69b9a5 | 2011-12-28 06:47:01 +0000 | [diff] [blame] | 98 | debug("%s: Assuming buffer pointer in arg 3\n", |
Michal Simek | a888af7 | 2013-04-26 13:10:07 +0200 | [diff] [blame] | 99 | __func__); |
Marian Balakowicz | d79162d | 2008-03-12 10:33:01 +0100 | [diff] [blame] | 100 | |
| 101 | #if defined(CONFIG_FIT) |
Michal Simek | a888af7 | 2013-04-26 13:10:07 +0200 | [diff] [blame] | 102 | if (fit_parse_subimage(argv[2], (ulong)fpga_data, |
| 103 | &fit_addr, &fit_uname)) { |
Marian Balakowicz | d79162d | 2008-03-12 10:33:01 +0100 | [diff] [blame] | 104 | fpga_data = (void *)fit_addr; |
Michal Simek | a888af7 | 2013-04-26 13:10:07 +0200 | [diff] [blame] | 105 | debug("* fpga: subimage '%s' from FIT image ", |
| 106 | fit_uname); |
| 107 | debug("at 0x%08lx\n", fit_addr); |
Marian Balakowicz | d79162d | 2008-03-12 10:33:01 +0100 | [diff] [blame] | 108 | } else |
| 109 | #endif |
| 110 | { |
Michal Simek | a888af7 | 2013-04-26 13:10:07 +0200 | [diff] [blame] | 111 | fpga_data = (void *)dev; |
| 112 | debug("* fpga: cmdline image addr = 0x%08lx\n", |
| 113 | (ulong)fpga_data); |
Marian Balakowicz | d79162d | 2008-03-12 10:33:01 +0100 | [diff] [blame] | 114 | } |
| 115 | |
Stefano Babic | b69b9a5 | 2011-12-28 06:47:01 +0000 | [diff] [blame] | 116 | debug("%s: fpga_data = 0x%x\n", |
Michal Simek | a888af7 | 2013-04-26 13:10:07 +0200 | [diff] [blame] | 117 | __func__, (uint)fpga_data); |
wdenk | 1ebf41e | 2004-01-02 14:00:00 +0000 | [diff] [blame] | 118 | dev = FPGA_INVALID_DEVICE; /* reset device num */ |
| 119 | } |
Marian Balakowicz | d79162d | 2008-03-12 10:33:01 +0100 | [diff] [blame] | 120 | |
wdenk | 1ebf41e | 2004-01-02 14:00:00 +0000 | [diff] [blame] | 121 | case 2: /* fpga <op> */ |
Michal Simek | a888af7 | 2013-04-26 13:10:07 +0200 | [diff] [blame] | 122 | op = (int)fpga_get_op(argv[1]); |
wdenk | 1ebf41e | 2004-01-02 14:00:00 +0000 | [diff] [blame] | 123 | break; |
Marian Balakowicz | d79162d | 2008-03-12 10:33:01 +0100 | [diff] [blame] | 124 | |
wdenk | 1ebf41e | 2004-01-02 14:00:00 +0000 | [diff] [blame] | 125 | default: |
Michal Simek | a888af7 | 2013-04-26 13:10:07 +0200 | [diff] [blame] | 126 | debug("%s: Too many or too few args (%d)\n", __func__, argc); |
wdenk | 1ebf41e | 2004-01-02 14:00:00 +0000 | [diff] [blame] | 127 | op = FPGA_NONE; /* force usage display */ |
| 128 | break; |
| 129 | } |
wdenk | 4a9cbbe | 2002-08-27 09:48:53 +0000 | [diff] [blame] | 130 | |
Stefano Babic | 67d7f56 | 2010-10-19 09:22:52 +0200 | [diff] [blame] | 131 | if (dev == FPGA_INVALID_DEVICE) { |
| 132 | puts("FPGA device not specified\n"); |
| 133 | op = FPGA_NONE; |
| 134 | } |
| 135 | |
| 136 | switch (op) { |
| 137 | case FPGA_NONE: |
| 138 | case FPGA_INFO: |
| 139 | break; |
| 140 | case FPGA_LOAD: |
| 141 | case FPGA_LOADB: |
| 142 | case FPGA_DUMP: |
| 143 | if (!fpga_data || !data_size) |
| 144 | wrong_parms = 1; |
| 145 | break; |
| 146 | case FPGA_LOADMK: |
| 147 | if (!fpga_data) |
| 148 | wrong_parms = 1; |
| 149 | break; |
| 150 | } |
| 151 | |
| 152 | if (wrong_parms) { |
| 153 | puts("Wrong parameters for FPGA request\n"); |
| 154 | op = FPGA_NONE; |
| 155 | } |
| 156 | |
wdenk | 1ebf41e | 2004-01-02 14:00:00 +0000 | [diff] [blame] | 157 | switch (op) { |
| 158 | case FPGA_NONE: |
Simon Glass | a06dfc7 | 2011-12-10 08:44:01 +0000 | [diff] [blame] | 159 | return CMD_RET_USAGE; |
wdenk | 4a9cbbe | 2002-08-27 09:48:53 +0000 | [diff] [blame] | 160 | |
wdenk | 1ebf41e | 2004-01-02 14:00:00 +0000 | [diff] [blame] | 161 | case FPGA_INFO: |
Michal Simek | a888af7 | 2013-04-26 13:10:07 +0200 | [diff] [blame] | 162 | rc = fpga_info(dev); |
wdenk | 1ebf41e | 2004-01-02 14:00:00 +0000 | [diff] [blame] | 163 | break; |
wdenk | 4a9cbbe | 2002-08-27 09:48:53 +0000 | [diff] [blame] | 164 | |
wdenk | 1ebf41e | 2004-01-02 14:00:00 +0000 | [diff] [blame] | 165 | case FPGA_LOAD: |
Michal Simek | a888af7 | 2013-04-26 13:10:07 +0200 | [diff] [blame] | 166 | rc = fpga_load(dev, fpga_data, data_size); |
wdenk | 1ebf41e | 2004-01-02 14:00:00 +0000 | [diff] [blame] | 167 | break; |
wdenk | 4a9cbbe | 2002-08-27 09:48:53 +0000 | [diff] [blame] | 168 | |
wdenk | 310b4fc | 2005-01-09 18:12:51 +0000 | [diff] [blame] | 169 | case FPGA_LOADB: |
| 170 | rc = fpga_loadbitstream(dev, fpga_data, data_size); |
| 171 | break; |
| 172 | |
Stefan Roese | 5f1cf2d | 2006-08-15 14:15:51 +0200 | [diff] [blame] | 173 | case FPGA_LOADMK: |
Michal Simek | a888af7 | 2013-04-26 13:10:07 +0200 | [diff] [blame] | 174 | switch (genimg_get_format(fpga_data)) { |
Marian Balakowicz | dbdd16a | 2008-02-04 08:28:09 +0100 | [diff] [blame] | 175 | case IMAGE_FORMAT_LEGACY: |
| 176 | { |
Michal Simek | a888af7 | 2013-04-26 13:10:07 +0200 | [diff] [blame] | 177 | image_header_t *hdr = |
| 178 | (image_header_t *)fpga_data; |
| 179 | ulong data; |
Stefan Roese | 5f1cf2d | 2006-08-15 14:15:51 +0200 | [diff] [blame] | 180 | |
Michal Simek | a888af7 | 2013-04-26 13:10:07 +0200 | [diff] [blame] | 181 | data = (ulong)image_get_data(hdr); |
| 182 | data_size = image_get_data_size(hdr); |
| 183 | rc = fpga_load(dev, (void *)data, data_size); |
Stefan Roese | 5f1cf2d | 2006-08-15 14:15:51 +0200 | [diff] [blame] | 184 | } |
Marian Balakowicz | dbdd16a | 2008-02-04 08:28:09 +0100 | [diff] [blame] | 185 | break; |
| 186 | #if defined(CONFIG_FIT) |
| 187 | case IMAGE_FORMAT_FIT: |
Marian Balakowicz | d79162d | 2008-03-12 10:33:01 +0100 | [diff] [blame] | 188 | { |
| 189 | const void *fit_hdr = (const void *)fpga_data; |
| 190 | int noffset; |
Wolfgang Denk | 74f9b38 | 2011-07-30 13:33:49 +0000 | [diff] [blame] | 191 | const void *fit_data; |
Marian Balakowicz | d79162d | 2008-03-12 10:33:01 +0100 | [diff] [blame] | 192 | |
| 193 | if (fit_uname == NULL) { |
Michal Simek | a888af7 | 2013-04-26 13:10:07 +0200 | [diff] [blame] | 194 | puts("No FIT subimage unit name\n"); |
Marian Balakowicz | d79162d | 2008-03-12 10:33:01 +0100 | [diff] [blame] | 195 | return 1; |
| 196 | } |
| 197 | |
Michal Simek | a888af7 | 2013-04-26 13:10:07 +0200 | [diff] [blame] | 198 | if (!fit_check_format(fit_hdr)) { |
| 199 | puts("Bad FIT image format\n"); |
Marian Balakowicz | d79162d | 2008-03-12 10:33:01 +0100 | [diff] [blame] | 200 | return 1; |
| 201 | } |
| 202 | |
| 203 | /* get fpga component image node offset */ |
Michal Simek | a888af7 | 2013-04-26 13:10:07 +0200 | [diff] [blame] | 204 | noffset = fit_image_get_node(fit_hdr, |
| 205 | fit_uname); |
Marian Balakowicz | d79162d | 2008-03-12 10:33:01 +0100 | [diff] [blame] | 206 | if (noffset < 0) { |
Michal Simek | a888af7 | 2013-04-26 13:10:07 +0200 | [diff] [blame] | 207 | printf("Can't find '%s' FIT subimage\n", |
| 208 | fit_uname); |
Marian Balakowicz | d79162d | 2008-03-12 10:33:01 +0100 | [diff] [blame] | 209 | return 1; |
| 210 | } |
| 211 | |
| 212 | /* verify integrity */ |
Simon Glass | 7428ad1 | 2013-05-07 06:11:57 +0000 | [diff] [blame] | 213 | if (!fit_image_verify(fit_hdr, noffset)) { |
Marian Balakowicz | d79162d | 2008-03-12 10:33:01 +0100 | [diff] [blame] | 214 | puts ("Bad Data Hash\n"); |
| 215 | return 1; |
| 216 | } |
| 217 | |
| 218 | /* get fpga subimage data address and length */ |
Michal Simek | a888af7 | 2013-04-26 13:10:07 +0200 | [diff] [blame] | 219 | if (fit_image_get_data(fit_hdr, noffset, |
| 220 | &fit_data, &data_size)) { |
| 221 | puts("Fpga subimage data not found\n"); |
Marian Balakowicz | d79162d | 2008-03-12 10:33:01 +0100 | [diff] [blame] | 222 | return 1; |
| 223 | } |
| 224 | |
Michal Simek | a888af7 | 2013-04-26 13:10:07 +0200 | [diff] [blame] | 225 | rc = fpga_load(dev, fit_data, data_size); |
Marian Balakowicz | d79162d | 2008-03-12 10:33:01 +0100 | [diff] [blame] | 226 | } |
Marian Balakowicz | dbdd16a | 2008-02-04 08:28:09 +0100 | [diff] [blame] | 227 | break; |
| 228 | #endif |
| 229 | default: |
Michal Simek | a888af7 | 2013-04-26 13:10:07 +0200 | [diff] [blame] | 230 | puts("** Unknown image type\n"); |
Marian Balakowicz | dbdd16a | 2008-02-04 08:28:09 +0100 | [diff] [blame] | 231 | rc = FPGA_FAIL; |
| 232 | break; |
Stefan Roese | 5f1cf2d | 2006-08-15 14:15:51 +0200 | [diff] [blame] | 233 | } |
| 234 | break; |
| 235 | |
wdenk | 1ebf41e | 2004-01-02 14:00:00 +0000 | [diff] [blame] | 236 | case FPGA_DUMP: |
Michal Simek | a888af7 | 2013-04-26 13:10:07 +0200 | [diff] [blame] | 237 | rc = fpga_dump(dev, fpga_data, data_size); |
wdenk | 1ebf41e | 2004-01-02 14:00:00 +0000 | [diff] [blame] | 238 | break; |
wdenk | 4a9cbbe | 2002-08-27 09:48:53 +0000 | [diff] [blame] | 239 | |
wdenk | 1ebf41e | 2004-01-02 14:00:00 +0000 | [diff] [blame] | 240 | default: |
Michal Simek | a888af7 | 2013-04-26 13:10:07 +0200 | [diff] [blame] | 241 | printf("Unknown operation\n"); |
Simon Glass | a06dfc7 | 2011-12-10 08:44:01 +0000 | [diff] [blame] | 242 | return CMD_RET_USAGE; |
wdenk | 1ebf41e | 2004-01-02 14:00:00 +0000 | [diff] [blame] | 243 | } |
Michal Simek | a888af7 | 2013-04-26 13:10:07 +0200 | [diff] [blame] | 244 | return rc; |
wdenk | 4a9cbbe | 2002-08-27 09:48:53 +0000 | [diff] [blame] | 245 | } |
| 246 | |
wdenk | 4a9cbbe | 2002-08-27 09:48:53 +0000 | [diff] [blame] | 247 | /* |
| 248 | * Map op to supported operations. We don't use a table since we |
| 249 | * would just have to relocate it from flash anyway. |
| 250 | */ |
Michal Simek | a888af7 | 2013-04-26 13:10:07 +0200 | [diff] [blame] | 251 | static int fpga_get_op(char *opstr) |
wdenk | 4a9cbbe | 2002-08-27 09:48:53 +0000 | [diff] [blame] | 252 | { |
| 253 | int op = FPGA_NONE; |
| 254 | |
Michal Simek | a888af7 | 2013-04-26 13:10:07 +0200 | [diff] [blame] | 255 | if (!strcmp("info", opstr)) |
wdenk | 4a9cbbe | 2002-08-27 09:48:53 +0000 | [diff] [blame] | 256 | op = FPGA_INFO; |
Michal Simek | a888af7 | 2013-04-26 13:10:07 +0200 | [diff] [blame] | 257 | else if (!strcmp("loadb", opstr)) |
wdenk | 310b4fc | 2005-01-09 18:12:51 +0000 | [diff] [blame] | 258 | op = FPGA_LOADB; |
Michal Simek | a888af7 | 2013-04-26 13:10:07 +0200 | [diff] [blame] | 259 | else if (!strcmp("load", opstr)) |
wdenk | 4a9cbbe | 2002-08-27 09:48:53 +0000 | [diff] [blame] | 260 | op = FPGA_LOAD; |
Michal Simek | a888af7 | 2013-04-26 13:10:07 +0200 | [diff] [blame] | 261 | else if (!strcmp("loadmk", opstr)) |
Stefan Roese | 5f1cf2d | 2006-08-15 14:15:51 +0200 | [diff] [blame] | 262 | op = FPGA_LOADMK; |
Michal Simek | a888af7 | 2013-04-26 13:10:07 +0200 | [diff] [blame] | 263 | else if (!strcmp("dump", opstr)) |
wdenk | 4a9cbbe | 2002-08-27 09:48:53 +0000 | [diff] [blame] | 264 | op = FPGA_DUMP; |
wdenk | 4a9cbbe | 2002-08-27 09:48:53 +0000 | [diff] [blame] | 265 | |
Michal Simek | a888af7 | 2013-04-26 13:10:07 +0200 | [diff] [blame] | 266 | if (op == FPGA_NONE) |
| 267 | printf("Unknown fpga operation \"%s\"\n", opstr); |
| 268 | |
wdenk | 4a9cbbe | 2002-08-27 09:48:53 +0000 | [diff] [blame] | 269 | return op; |
| 270 | } |
| 271 | |
Michal Simek | a888af7 | 2013-04-26 13:10:07 +0200 | [diff] [blame] | 272 | U_BOOT_CMD(fpga, 6, 1, do_fpga, |
| 273 | "loadable FPGA image support", |
| 274 | "[operation type] [device number] [image address] [image size]\n" |
| 275 | "fpga operations:\n" |
| 276 | " dump\t[dev]\t\t\tLoad device to memory buffer\n" |
| 277 | " info\t[dev]\t\t\tlist known device information\n" |
| 278 | " load\t[dev] [address] [size]\tLoad device from memory buffer\n" |
| 279 | " loadb\t[dev] [address] [size]\t" |
| 280 | "Load device from bitstream buffer (Xilinx only)\n" |
| 281 | " loadmk [dev] [address]\tLoad device generated with mkimage" |
Marian Balakowicz | d79162d | 2008-03-12 10:33:01 +0100 | [diff] [blame] | 282 | #if defined(CONFIG_FIT) |
Michal Simek | a888af7 | 2013-04-26 13:10:07 +0200 | [diff] [blame] | 283 | "\n" |
| 284 | "\tFor loadmk operating on FIT format uImage address must include\n" |
| 285 | "\tsubimage unit name in the form of addr:<subimg_uname>" |
Marian Balakowicz | d79162d | 2008-03-12 10:33:01 +0100 | [diff] [blame] | 286 | #endif |
| 287 | ); |