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git01.mediatek.com / filogic / uboot / afed704b79a521676d2ce0385f3af1bfa26ebe83 / . / include / configs / am57xx_evm.h
blob: 956844414f86389e42bc45554db822dd248a94ff [file] [log] [blame]
Tom Rini10e47792018-05-06 17:58:06 -0400[diff] [blame]1/* SPDX-License-Identifier: GPL-2.0+ */
Felipe Balbi4750eb62014-11-10 14:02:44 -0600[diff] [blame]2/*
3 * (C) Copyright 2014
4 * Texas Instruments Incorporated.
5 * Felipe Balbi <balbi@ti.com>
6 *
7 * Configuration settings for the TI Beagle x15 board.
8 * See ti_omap5_common.h for omap5 common settings.
Felipe Balbi4750eb62014-11-10 14:02:44 -0600[diff] [blame]9 */
10
Kipisz, Steven1dacd0d2015-10-29 16:50:43 -0500[diff] [blame]11#ifndef __CONFIG_AM57XX_EVM_H
12#define __CONFIG_AM57XX_EVM_H
Felipe Balbi4750eb62014-11-10 14:02:44 -0600[diff] [blame]13
Sekhar Norid9cd14f2016-11-25 14:25:55 +0530[diff] [blame]14#include <environment/ti/dfu.h>
Semen Protsenko2698dac2017-06-09 17:12:56 +0300[diff] [blame]15#include <linux/sizes.h>
Sekhar Norid9cd14f2016-11-25 14:25:55 +0530[diff] [blame]16
Lokesh Vutlac3d39f92015-06-04 16:42:41 +0530[diff] [blame]17#define CONFIG_IODELAY_RECALIBRATION
Lokesh Vutlac3d39f92015-06-04 16:42:41 +0530[diff] [blame]18
Sam Protsenkocb4ba282019-07-02 20:56:09 +0300[diff] [blame]19#define CONFIG_SYS_BOOTM_LEN SZ_64M
20
Felipe Balbi4750eb62014-11-10 14:02:44 -0600[diff] [blame]21#define CONFIG_SYS_NS16550_COM1 UART1_BASE /* Base EVM has UART0 */
22#define CONFIG_SYS_NS16550_COM2 UART2_BASE /* UART2 */
23#define CONFIG_SYS_NS16550_COM3 UART3_BASE /* UART3 */
Felipe Balbi4750eb62014-11-10 14:02:44 -0600[diff] [blame]24
25#define CONFIG_SYS_OMAP_ABE_SYSCK
26
Bin Liu7dab6922019-02-08 11:01:37 -0600[diff] [blame]27#ifndef CONFIG_SPL_BUILD
Sekhar Norid9cd14f2016-11-25 14:25:55 +0530[diff] [blame]28#define DFUARGS \
29 "dfu_bufsiz=0x10000\0" \
30 DFU_ALT_INFO_MMC \
31 DFU_ALT_INFO_EMMC \
32 DFU_ALT_INFO_RAM \
Bin Liu7dab6922019-02-08 11:01:37 -0600[diff] [blame]33 DFU_ALT_INFO_QSPI
34#else
Sam Protsenko9cb512b2020-01-10 15:11:30 +0200[diff] [blame]35#ifdef CONFIG_SPL_DFU
Bin Liu7dab6922019-02-08 11:01:37 -0600[diff] [blame]36#define DFUARGS \
37 "dfu_bufsiz=0x10000\0" \
38 DFU_ALT_INFO_RAM
39#endif
40#endif
Sekhar Norid9cd14f2016-11-25 14:25:55 +0530[diff] [blame]41
Felipe Balbi4750eb62014-11-10 14:02:44 -0600[diff] [blame]42#include <configs/ti_omap5_common.h>
43
44/* Enhance our eMMC support / experience. */
Semen Protsenko7aab6842016-10-31 19:53:42 +0200[diff] [blame]45#define CONFIG_HSMMC2_8BIT
Felipe Balbi4750eb62014-11-10 14:02:44 -0600[diff] [blame]46
47/* CPSW Ethernet */
Felipe Balbi4750eb62014-11-10 14:02:44 -0600[diff] [blame]48#define CONFIG_NET_RETRY_COUNT 10
Sekhar Noridd163312015-03-10 16:00:09 +0530[diff] [blame]49#define PHY_ANEG_TIMEOUT 8000 /* PHY needs longer aneg time at 1G */
Felipe Balbi4750eb62014-11-10 14:02:44 -0600[diff] [blame]50
Felipe Balbi4750eb62014-11-10 14:02:44 -0600[diff] [blame]51/* SATA */
Felipe Balbi4750eb62014-11-10 14:02:44 -0600[diff] [blame]52#define CONFIG_SCSI_AHCI_PLAT
53#define CONFIG_SYS_SCSI_MAX_SCSI_ID 1
54#define CONFIG_SYS_SCSI_MAX_LUN 1
55#define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \
56 CONFIG_SYS_SCSI_MAX_LUN)
57
Vignesh R533520a2016-07-29 14:22:30 +0530[diff] [blame]58/*
59 * Default to using SPI for environment, etc.
60 * 0x000000 - 0x040000 : QSPI.SPL (256KiB)
61 * 0x040000 - 0x140000 : QSPI.u-boot (1MiB)
62 * 0x140000 - 0x1C0000 : QSPI.u-boot-spl-os (512KiB)
63 * 0x1C0000 - 0x1D0000 : QSPI.u-boot-env (64KiB)
64 * 0x1D0000 - 0x1E0000 : QSPI.u-boot-env.backup1 (64KiB)
65 * 0x1E0000 - 0x9E0000 : QSPI.kernel (8MiB)
66 * 0x9E0000 - 0x2000000 : USERLAND
67 */
68#define CONFIG_SYS_SPI_KERNEL_OFFS 0x1E0000
69#define CONFIG_SYS_SPI_ARGS_OFFS 0x140000
70#define CONFIG_SYS_SPI_ARGS_SIZE 0x80000
71
Vignesh R533520a2016-07-29 14:22:30 +0530[diff] [blame]72/* SPI SPL */
Vignesh R533520a2016-07-29 14:22:30 +0530[diff] [blame]73
Kipisz, Steven1dacd0d2015-10-29 16:50:43 -0500[diff] [blame]74#endif /* __CONFIG_AM57XX_EVM_H */