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Tom Rini10e47792018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Heiko Schochercfcad352013-12-02 07:47:22 +01002/*
3 * Board functions for Siemens TAURUS (AT91SAM9G20) based boards
4 * (C) Copyright Siemens AG
5 *
6 * Based on:
7 * U-Boot file: board/atmel/at91sam9260ek/at91sam9260ek.c
8 *
9 * (C) Copyright 2007-2008
10 * Stelian Pop <stelian@popies.net>
11 * Lead Tech Design <www.leadtechdesign.com>
Heiko Schochercfcad352013-12-02 07:47:22 +010012 */
13
Heiko Schocherb7773572015-08-21 18:53:46 +020014#include <command.h>
Heiko Schochercfcad352013-12-02 07:47:22 +010015#include <common.h>
Heiko Schocher649d8102016-05-25 07:23:48 +020016#include <dm.h>
Simon Glass5e6201b2019-08-01 09:46:51 -060017#include <env.h>
Simon Glass8e16b1e2019-12-28 10:45:05 -070018#include <init.h>
Heiko Schochercfcad352013-12-02 07:47:22 +010019#include <asm/io.h>
20#include <asm/arch/at91sam9260_matrix.h>
21#include <asm/arch/at91sam9_smc.h>
22#include <asm/arch/at91_common.h>
Heiko Schochercfcad352013-12-02 07:47:22 +010023#include <asm/arch/at91_rstc.h>
24#include <asm/arch/gpio.h>
25#include <asm/arch/at91sam9_sdramc.h>
Heiko Schocher649d8102016-05-25 07:23:48 +020026#include <asm/arch/atmel_serial.h>
Heiko Schocher5453c6c2014-10-31 08:31:05 +010027#include <asm/arch/clk.h>
Heiko Schocher649d8102016-05-25 07:23:48 +020028#include <asm/gpio.h>
Masahiro Yamada2b7a8732017-11-30 13:45:24 +090029#include <linux/mtd/rawnand.h>
Heiko Schochercfcad352013-12-02 07:47:22 +010030#include <atmel_mci.h>
Heiko Schocher398b45b2014-10-31 08:30:56 +010031#include <asm/arch/at91_spi.h>
32#include <spi.h>
Heiko Schochercfcad352013-12-02 07:47:22 +010033
34#include <net.h>
Heiko Schocher649d8102016-05-25 07:23:48 +020035#ifndef CONFIG_DM_ETH
Heiko Schochercfcad352013-12-02 07:47:22 +010036#include <netdev.h>
Heiko Schocher649d8102016-05-25 07:23:48 +020037#endif
Heiko Schochercfcad352013-12-02 07:47:22 +010038
39DECLARE_GLOBAL_DATA_PTR;
40
Heiko Schocher649d8102016-05-25 07:23:48 +020041static void taurus_request_gpio(void)
42{
43 gpio_request(CONFIG_SYS_NAND_ENABLE_PIN, "nand ena");
44 gpio_request(CONFIG_SYS_NAND_READY_PIN, "nand rdy");
45 gpio_request(AT91_PIN_PA25, "ena PHY");
46}
47
Heiko Schochercfcad352013-12-02 07:47:22 +010048static void taurus_nand_hw_init(void)
49{
50 struct at91_smc *smc = (struct at91_smc *)ATMEL_BASE_SMC;
51 struct at91_matrix *matrix = (struct at91_matrix *)ATMEL_BASE_MATRIX;
52 unsigned long csa;
53
54 /* Assign CS3 to NAND/SmartMedia Interface */
55 csa = readl(&matrix->ebicsa);
56 csa |= AT91_MATRIX_CS3A_SMC_SMARTMEDIA;
57 writel(csa, &matrix->ebicsa);
58
59 /* Configure SMC CS3 for NAND/SmartMedia */
60 writel(AT91_SMC_SETUP_NWE(2) | AT91_SMC_SETUP_NCS_WR(0) |
61 AT91_SMC_SETUP_NRD(2) | AT91_SMC_SETUP_NCS_RD(0),
62 &smc->cs[3].setup);
63 writel(AT91_SMC_PULSE_NWE(4) | AT91_SMC_PULSE_NCS_WR(3) |
64 AT91_SMC_PULSE_NRD(4) | AT91_SMC_PULSE_NCS_RD(3),
65 &smc->cs[3].pulse);
66 writel(AT91_SMC_CYCLE_NWE(7) | AT91_SMC_CYCLE_NRD(7),
67 &smc->cs[3].cycle);
68 writel(AT91_SMC_MODE_RM_NRD | AT91_SMC_MODE_WM_NWE |
69 AT91_SMC_MODE_EXNW_DISABLE |
70 AT91_SMC_MODE_DBW_8 |
71 AT91_SMC_MODE_TDF_CYCLE(3),
72 &smc->cs[3].mode);
73
74 /* Configure RDY/BSY */
75 at91_set_gpio_input(CONFIG_SYS_NAND_READY_PIN, 1);
76
77 /* Enable NandFlash */
78 at91_set_gpio_output(CONFIG_SYS_NAND_ENABLE_PIN, 1);
79}
Heiko Schocher5453c6c2014-10-31 08:31:05 +010080
81#if defined(CONFIG_SPL_BUILD)
82#include <spl.h>
83#include <nand.h>
Heiko Schocher6f2a3252014-11-18 09:41:58 +010084#include <spi_flash.h>
Heiko Schocher5453c6c2014-10-31 08:31:05 +010085
86void matrix_init(void)
87{
88 struct at91_matrix *mat = (struct at91_matrix *)ATMEL_BASE_MATRIX;
89
90 writel((readl(&mat->scfg[3]) & (~AT91_MATRIX_SLOT_CYCLE))
91 | AT91_MATRIX_SLOT_CYCLE_(0x40),
92 &mat->scfg[3]);
93}
94
Heiko Schocherb7773572015-08-21 18:53:46 +020095#if defined(CONFIG_BOARD_AXM)
96static int at91_is_recovery(void)
97{
98 if ((at91_get_gpio_value(AT91_PIN_PA26) == 0) &&
99 (at91_get_gpio_value(AT91_PIN_PA27) == 0))
100 return 1;
101
102 return 0;
103}
104#elif defined(CONFIG_BOARD_TAURUS)
105static int at91_is_recovery(void)
106{
107 if (at91_get_gpio_value(AT91_PIN_PA31) == 0)
108 return 1;
109
110 return 0;
111}
112#endif
113
Heiko Schocher6dcb3622015-08-21 18:55:07 +0200114void spl_board_init(void)
Heiko Schocher5453c6c2014-10-31 08:31:05 +0100115{
116 taurus_nand_hw_init();
Heiko Schocher6f2a3252014-11-18 09:41:58 +0100117 at91_spi0_hw_init(TAURUS_SPI_MASK);
Heiko Schocher5453c6c2014-10-31 08:31:05 +0100118
Heiko Schocherb7773572015-08-21 18:53:46 +0200119#if defined(CONFIG_BOARD_AXM)
120 /* Configure LED PINs */
121 at91_set_gpio_output(AT91_PIN_PA6, 0);
122 at91_set_gpio_output(AT91_PIN_PA8, 0);
123 at91_set_gpio_output(AT91_PIN_PA9, 0);
124 at91_set_gpio_output(AT91_PIN_PA10, 0);
125 at91_set_gpio_output(AT91_PIN_PA11, 0);
126 at91_set_gpio_output(AT91_PIN_PA12, 0);
127
Heiko Schocher5453c6c2014-10-31 08:31:05 +0100128 /* Configure recovery button PINs */
Heiko Schocherb7773572015-08-21 18:53:46 +0200129 at91_set_gpio_input(AT91_PIN_PA26, 1);
130 at91_set_gpio_input(AT91_PIN_PA27, 1);
131#elif defined(CONFIG_BOARD_TAURUS)
Heiko Schocher5453c6c2014-10-31 08:31:05 +0100132 at91_set_gpio_input(AT91_PIN_PA31, 1);
Heiko Schocherb7773572015-08-21 18:53:46 +0200133#endif
Heiko Schocher5453c6c2014-10-31 08:31:05 +0100134
Heiko Schocherb7773572015-08-21 18:53:46 +0200135 /* check for recovery mode */
136 if (at91_is_recovery() == 1) {
Heiko Schocher6f2a3252014-11-18 09:41:58 +0100137 struct spi_flash *flash;
Heiko Schocher5453c6c2014-10-31 08:31:05 +0100138
Heiko Schocher6dcb3622015-08-21 18:55:07 +0200139 puts("Recovery button pressed\n");
Heiko Schocher6f2a3252014-11-18 09:41:58 +0100140 nand_init();
141 spl_nand_erase_one(0, 0);
142 flash = spi_flash_probe(CONFIG_SF_DEFAULT_BUS,
143 0,
144 CONFIG_SF_DEFAULT_SPEED,
Heiko Schocher6dcb3622015-08-21 18:55:07 +0200145 CONFIG_SF_DEFAULT_MODE);
Heiko Schocher6f2a3252014-11-18 09:41:58 +0100146 if (!flash) {
147 puts("no flash\n");
148 } else {
149 puts("erase spi flash sector 0\n");
150 spi_flash_erase(flash, 0,
151 CONFIG_SYS_NAND_U_BOOT_SIZE);
Heiko Schocher5453c6c2014-10-31 08:31:05 +0100152 }
153 }
154}
155
Heiko Schocherb7773572015-08-21 18:53:46 +0200156#define SDRAM_BASE_CONF (AT91_SDRAMC_NR_13 | AT91_SDRAMC_CAS_3 \
157 |AT91_SDRAMC_NB_4 | AT91_SDRAMC_DBW_32 \
158 | AT91_SDRAMC_TWR_VAL(3) | AT91_SDRAMC_TRC_VAL(9) \
159 | AT91_SDRAMC_TRP_VAL(3) | AT91_SDRAMC_TRCD_VAL(3) \
160 | AT91_SDRAMC_TRAS_VAL(6) | AT91_SDRAMC_TXSR_VAL(10))
161
162void sdramc_configure(unsigned int mask)
Heiko Schocher5453c6c2014-10-31 08:31:05 +0100163{
164 struct at91_matrix *ma = (struct at91_matrix *)ATMEL_BASE_MATRIX;
165 struct sdramc_reg setting;
166
167 at91_sdram_hw_init();
Heiko Schocherb7773572015-08-21 18:53:46 +0200168 setting.cr = SDRAM_BASE_CONF | mask;
Heiko Schocher5453c6c2014-10-31 08:31:05 +0100169 setting.mdr = AT91_SDRAMC_MD_SDRAM;
170 setting.tr = (CONFIG_SYS_MASTER_CLOCK * 7) / 1000000;
171
Heiko Schocher5453c6c2014-10-31 08:31:05 +0100172 writel(readl(&ma->ebicsa) | AT91_MATRIX_CS1A_SDRAMC |
173 AT91_MATRIX_VDDIOMSEL_3_3V | AT91_MATRIX_EBI_IOSR_SEL,
174 &ma->ebicsa);
Heiko Schocherb7773572015-08-21 18:53:46 +0200175
Heiko Schocher5453c6c2014-10-31 08:31:05 +0100176 sdramc_initialize(ATMEL_BASE_CS1, &setting);
177}
Heiko Schocherb7773572015-08-21 18:53:46 +0200178
179void mem_init(void)
180{
181 unsigned int ram_size = 0;
182
183 /* Configure SDRAM for 128MB */
184 sdramc_configure(AT91_SDRAMC_NC_10);
185
186 /* Do memtest for 128MB */
187 ram_size = get_ram_size((void *)CONFIG_SYS_SDRAM_BASE,
188 CONFIG_SYS_SDRAM_SIZE);
189
190 /*
191 * If 32MB or 16MB should be supported check also for
192 * expected mirroring at A16 and A17
193 * To find mirror addresses depends how the collumns are connected
194 * at RAM (internaly or externaly)
195 * If the collumns are not in inverted order the mirror size effect
196 * behaves like normal SRAM with A0,A1,A2,etc. connected incremantal
197 */
198
199 /* Mirrors at A15 on ATMEL G20 SDRAM Controller with 64MB*/
200 if (ram_size == 0x800) {
Heiko Schocher1af10bb2019-04-29 16:36:10 +0200201 printf("\n\r 64MB\n");
Heiko Schocherb7773572015-08-21 18:53:46 +0200202 sdramc_configure(AT91_SDRAMC_NC_9);
203 } else {
204 /* Size already initialized */
Heiko Schocher1af10bb2019-04-29 16:36:10 +0200205 printf("\n\r 128MB\n");
Heiko Schocherb7773572015-08-21 18:53:46 +0200206 }
207}
Heiko Schocher5453c6c2014-10-31 08:31:05 +0100208#endif
Heiko Schochercfcad352013-12-02 07:47:22 +0100209
210#ifdef CONFIG_MACB
Heiko Schocherb7773572015-08-21 18:53:46 +0200211static void siemens_phy_reset(void)
212{
213 /*
214 * we need to reset PHY for 200us
215 * because of bug in ATMEL G20 CPU (undefined initial state of GPIO)
216 */
217 if ((readl(AT91_ASM_RSTC_SR) & AT91_RSTC_RSTTYP) ==
218 AT91_RSTC_RSTTYP_GENERAL)
219 at91_set_gpio_value(AT91_PIN_PA25, 0); /* reset eth switch */
220}
221
Heiko Schochercfcad352013-12-02 07:47:22 +0100222static void taurus_macb_hw_init(void)
223{
Heiko Schochercfcad352013-12-02 07:47:22 +0100224 /* Enable EMAC clock */
Heiko Schocher5453c6c2014-10-31 08:31:05 +0100225 at91_periph_clk_enable(ATMEL_ID_EMAC0);
Heiko Schochercfcad352013-12-02 07:47:22 +0100226
227 /*
228 * Disable pull-up on:
229 * RXDV (PA17) => PHY normal mode (not Test mode)
230 * ERX0 (PA14) => PHY ADDR0
231 * ERX1 (PA15) => PHY ADDR1
232 * ERX2 (PA25) => PHY ADDR2
233 * ERX3 (PA26) => PHY ADDR3
234 * ECRS (PA28) => PHY ADDR4 => PHYADDR = 0x0
235 *
236 * PHY has internal pull-down
237 */
238 at91_set_pio_pullup(AT91_PIO_PORTA, 14, 0);
239 at91_set_pio_pullup(AT91_PIO_PORTA, 15, 0);
240 at91_set_pio_pullup(AT91_PIO_PORTA, 17, 0);
241 at91_set_pio_pullup(AT91_PIO_PORTA, 25, 0);
242 at91_set_pio_pullup(AT91_PIO_PORTA, 26, 0);
243 at91_set_pio_pullup(AT91_PIO_PORTA, 28, 0);
244
Heiko Schocherb7773572015-08-21 18:53:46 +0200245 siemens_phy_reset();
246
Heiko Schochercfcad352013-12-02 07:47:22 +0100247 at91_phy_reset();
248
249 at91_set_gpio_input(AT91_PIN_PA25, 1); /* ERST tri-state */
250
251 /* Re-enable pull-up */
252 at91_set_pio_pullup(AT91_PIO_PORTA, 14, 1);
253 at91_set_pio_pullup(AT91_PIO_PORTA, 15, 1);
254 at91_set_pio_pullup(AT91_PIO_PORTA, 17, 1);
255 at91_set_pio_pullup(AT91_PIO_PORTA, 25, 1);
256 at91_set_pio_pullup(AT91_PIO_PORTA, 26, 1);
257 at91_set_pio_pullup(AT91_PIO_PORTA, 28, 1);
258
259 /* Initialize EMAC=MACB hardware */
260 at91_macb_hw_init();
261}
262#endif
263
264#ifdef CONFIG_GENERIC_ATMEL_MCI
265int board_mmc_init(bd_t *bd)
266{
267 at91_mci_hw_init();
268
269 return atmel_mci_init((void *)ATMEL_BASE_MCI);
270}
271#endif
272
273int board_early_init_f(void)
274{
Heiko Schochercfcad352013-12-02 07:47:22 +0100275 /* Enable clocks for all PIOs */
Heiko Schocher5453c6c2014-10-31 08:31:05 +0100276 at91_periph_clk_enable(ATMEL_ID_PIOA);
277 at91_periph_clk_enable(ATMEL_ID_PIOB);
278 at91_periph_clk_enable(ATMEL_ID_PIOC);
279
280 at91_seriald_hw_init();
Heiko Schocher649d8102016-05-25 07:23:48 +0200281 taurus_request_gpio();
Heiko Schochercfcad352013-12-02 07:47:22 +0100282
283 return 0;
284}
285
Heiko Schochercf5137c2015-09-08 11:52:52 +0200286#ifdef CONFIG_USB_GADGET_AT91
287#include <linux/usb/at91_udc.h>
288
289void at91_udp_hw_init(void)
290{
Heiko Schochercf5137c2015-09-08 11:52:52 +0200291 /* Enable PLLB */
Wenyou Yangc5c6efe2016-02-03 10:20:45 +0800292 at91_pllb_clk_enable(get_pllb_init());
Heiko Schochercf5137c2015-09-08 11:52:52 +0200293
294 /* Enable UDPCK clock, MCK is enabled in at91_clock_init() */
295 at91_periph_clk_enable(ATMEL_ID_UDP);
296
Wenyou Yang78f89762016-02-03 10:16:50 +0800297 at91_system_clk_enable(AT91SAM926x_PMC_UDP);
Heiko Schochercf5137c2015-09-08 11:52:52 +0200298}
299
300struct at91_udc_data board_udc_data = {
301 .baseaddr = ATMEL_BASE_UDP0,
302};
303#endif
304
Heiko Schochercfcad352013-12-02 07:47:22 +0100305int board_init(void)
306{
307 /* adress of boot parameters */
308 gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
309
Heiko Schocher649d8102016-05-25 07:23:48 +0200310 taurus_request_gpio();
Heiko Schochercfcad352013-12-02 07:47:22 +0100311#ifdef CONFIG_CMD_NAND
312 taurus_nand_hw_init();
313#endif
314#ifdef CONFIG_MACB
315 taurus_macb_hw_init();
316#endif
Heiko Schocher398b45b2014-10-31 08:30:56 +0100317 at91_spi0_hw_init(TAURUS_SPI_MASK);
Heiko Schochercf5137c2015-09-08 11:52:52 +0200318#ifdef CONFIG_USB_GADGET_AT91
319 at91_udp_hw_init();
320 at91_udc_probe(&board_udc_data);
321#endif
Heiko Schochercfcad352013-12-02 07:47:22 +0100322
323 return 0;
324}
325
326int dram_init(void)
327{
328 gd->ram_size = get_ram_size((void *)CONFIG_SYS_SDRAM_BASE,
329 CONFIG_SYS_SDRAM_SIZE);
330 return 0;
331}
Heiko Schocherb7773572015-08-21 18:53:46 +0200332
333#if !defined(CONFIG_SPL_BUILD)
334#if defined(CONFIG_BOARD_AXM)
335/*
336 * Booting the Fallback Image.
337 *
338 * The function is used to provide and
339 * boot the image with the fallback
340 * parameters, incase if the faulty image
341 * in upgraded over the base firmware.
342 *
343 */
344static int upgrade_failure_fallback(void)
345{
346 char *partitionset_active = NULL;
347 char *rootfs = NULL;
348 char *rootfs_fallback = NULL;
349 char *kern_off;
350 char *kern_off_fb;
351 char *kern_size;
352 char *kern_size_fb;
353
Simon Glass64b723f2017-08-03 12:22:12 -0600354 partitionset_active = env_get("partitionset_active");
Heiko Schocherb7773572015-08-21 18:53:46 +0200355 if (partitionset_active) {
356 if (partitionset_active[0] == 'A')
Simon Glass6a38e412017-08-03 12:22:09 -0600357 env_set("partitionset_active", "B");
Heiko Schocherb7773572015-08-21 18:53:46 +0200358 else
Simon Glass6a38e412017-08-03 12:22:09 -0600359 env_set("partitionset_active", "A");
Heiko Schocherb7773572015-08-21 18:53:46 +0200360 } else {
361 printf("partitionset_active missing.\n");
362 return -ENOENT;
363 }
364
Simon Glass64b723f2017-08-03 12:22:12 -0600365 rootfs = env_get("rootfs");
366 rootfs_fallback = env_get("rootfs_fallback");
Simon Glass6a38e412017-08-03 12:22:09 -0600367 env_set("rootfs", rootfs_fallback);
368 env_set("rootfs_fallback", rootfs);
Heiko Schocherb7773572015-08-21 18:53:46 +0200369
Simon Glass64b723f2017-08-03 12:22:12 -0600370 kern_size = env_get("kernel_size");
371 kern_size_fb = env_get("kernel_size_fallback");
Simon Glass6a38e412017-08-03 12:22:09 -0600372 env_set("kernel_size", kern_size_fb);
373 env_set("kernel_size_fallback", kern_size);
Heiko Schocherb7773572015-08-21 18:53:46 +0200374
Simon Glass64b723f2017-08-03 12:22:12 -0600375 kern_off = env_get("kernel_Off");
376 kern_off_fb = env_get("kernel_Off_fallback");
Simon Glass6a38e412017-08-03 12:22:09 -0600377 env_set("kernel_Off", kern_off_fb);
378 env_set("kernel_Off_fallback", kern_off);
Heiko Schocherb7773572015-08-21 18:53:46 +0200379
Simon Glass6a38e412017-08-03 12:22:09 -0600380 env_set("bootargs", '\0');
381 env_set("upgrade_available", '\0');
382 env_set("boot_retries", '\0');
Simon Glassd49b8892017-08-03 12:22:08 -0600383 env_save();
Heiko Schocherb7773572015-08-21 18:53:46 +0200384
385 return 0;
386}
387
388static int do_upgrade_available(cmd_tbl_t *cmdtp, int flag, int argc,
389 char * const argv[])
390{
391 unsigned long upgrade_available = 0;
392 unsigned long boot_retry = 0;
393 char boot_buf[10];
394
Simon Glass64b723f2017-08-03 12:22:12 -0600395 upgrade_available = simple_strtoul(env_get("upgrade_available"), NULL,
Heiko Schocherb7773572015-08-21 18:53:46 +0200396 10);
397 if (upgrade_available) {
Simon Glass64b723f2017-08-03 12:22:12 -0600398 boot_retry = simple_strtoul(env_get("boot_retries"), NULL, 10);
Heiko Schocherb7773572015-08-21 18:53:46 +0200399 boot_retry++;
400 sprintf(boot_buf, "%lx", boot_retry);
Simon Glass6a38e412017-08-03 12:22:09 -0600401 env_set("boot_retries", boot_buf);
Simon Glassd49b8892017-08-03 12:22:08 -0600402 env_save();
Heiko Schocherb7773572015-08-21 18:53:46 +0200403
404 /*
405 * Here the boot_retries count is checked, and if the
406 * count becomes greater than 2 switch back to the
407 * fallback, and reset the board.
408 */
409
410 if (boot_retry > 2) {
411 if (upgrade_failure_fallback() == 0)
412 do_reset(NULL, 0, 0, NULL);
413 return -1;
414 }
415 }
416 return 0;
417}
418
419U_BOOT_CMD(
420 upgrade_available, 1, 1, do_upgrade_available,
421 "check Siemens update",
422 "no parameters"
423);
424#endif
425#endif