| Martyn Welch | 56f96e6 | 2022-10-25 10:55:02 +0100 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0+ |
| 2 | /* | ||||
| 3 | * Copyright 2019 NXP | ||||
| 4 | */ | ||||
| 5 | |||||
| 6 | #include "imx8mp-u-boot.dtsi" | ||||
| 7 | |||||
| 8 | / { | ||||
| 9 | model = "MSC SM2S-IMX8MPLUS"; | ||||
| 10 | compatible = "avnet,sm2s-imx8mp", "fsl,imx8mp"; | ||||
| 11 | |||||
| Fabio Estevam | 7259dbd | 2024-02-13 08:43:40 -0300 | [diff] [blame] | 12 | aliases { |
| 13 | mmc0 = &usdhc3; | ||||
| 14 | mmc1 = &usdhc2; | ||||
| 15 | }; | ||||
| 16 | |||||
| Martyn Welch | 56f96e6 | 2022-10-25 10:55:02 +0100 | [diff] [blame] | 17 | wdt-reboot { |
| 18 | compatible = "wdt-reboot"; | ||||
| 19 | wdt = <&wdog1>; | ||||
| Simon Glass | d3a98cb | 2023-02-13 08:56:33 -0700 | [diff] [blame] | 20 | bootph-pre-ram; |
| Martyn Welch | 56f96e6 | 2022-10-25 10:55:02 +0100 | [diff] [blame] | 21 | }; |
| 22 | }; | ||||
| 23 | |||||
| 24 | ®_usdhc2_vmmc { | ||||
| Simon Glass | d3a98cb | 2023-02-13 08:56:33 -0700 | [diff] [blame] | 25 | bootph-pre-ram; |
| Martyn Welch | 56f96e6 | 2022-10-25 10:55:02 +0100 | [diff] [blame] | 26 | }; |
| 27 | |||||
| 28 | &gpio1 { | ||||
| Simon Glass | d3a98cb | 2023-02-13 08:56:33 -0700 | [diff] [blame] | 29 | bootph-pre-ram; |
| Martyn Welch | 56f96e6 | 2022-10-25 10:55:02 +0100 | [diff] [blame] | 30 | }; |
| 31 | |||||
| 32 | &gpio2 { | ||||
| Simon Glass | d3a98cb | 2023-02-13 08:56:33 -0700 | [diff] [blame] | 33 | bootph-pre-ram; |
| Martyn Welch | 56f96e6 | 2022-10-25 10:55:02 +0100 | [diff] [blame] | 34 | }; |
| 35 | |||||
| 36 | &gpio3 { | ||||
| Simon Glass | d3a98cb | 2023-02-13 08:56:33 -0700 | [diff] [blame] | 37 | bootph-pre-ram; |
| Martyn Welch | 56f96e6 | 2022-10-25 10:55:02 +0100 | [diff] [blame] | 38 | }; |
| 39 | |||||
| 40 | &i2c1 { | ||||
| Simon Glass | d3a98cb | 2023-02-13 08:56:33 -0700 | [diff] [blame] | 41 | bootph-pre-ram; |
| Martyn Welch | 56f96e6 | 2022-10-25 10:55:02 +0100 | [diff] [blame] | 42 | }; |
| 43 | |||||
| 44 | &i2c2 { | ||||
| Simon Glass | d3a98cb | 2023-02-13 08:56:33 -0700 | [diff] [blame] | 45 | bootph-pre-ram; |
| Martyn Welch | 56f96e6 | 2022-10-25 10:55:02 +0100 | [diff] [blame] | 46 | }; |
| 47 | |||||
| 48 | &i2c3 { | ||||
| Simon Glass | d3a98cb | 2023-02-13 08:56:33 -0700 | [diff] [blame] | 49 | bootph-pre-ram; |
| Martyn Welch | 56f96e6 | 2022-10-25 10:55:02 +0100 | [diff] [blame] | 50 | }; |
| 51 | |||||
| 52 | &i2c4 { | ||||
| Simon Glass | d3a98cb | 2023-02-13 08:56:33 -0700 | [diff] [blame] | 53 | bootph-pre-ram; |
| Martyn Welch | 56f96e6 | 2022-10-25 10:55:02 +0100 | [diff] [blame] | 54 | }; |
| 55 | |||||
| 56 | &i2c5 { | ||||
| Simon Glass | d3a98cb | 2023-02-13 08:56:33 -0700 | [diff] [blame] | 57 | bootph-pre-ram; |
| Martyn Welch | 56f96e6 | 2022-10-25 10:55:02 +0100 | [diff] [blame] | 58 | }; |
| 59 | |||||
| 60 | &i2c6 { | ||||
| Simon Glass | d3a98cb | 2023-02-13 08:56:33 -0700 | [diff] [blame] | 61 | bootph-pre-ram; |
| Martyn Welch | 56f96e6 | 2022-10-25 10:55:02 +0100 | [diff] [blame] | 62 | }; |
| 63 | |||||
| 64 | &pinctrl_i2c6 { | ||||
| Simon Glass | d3a98cb | 2023-02-13 08:56:33 -0700 | [diff] [blame] | 65 | bootph-pre-ram; |
| Martyn Welch | 56f96e6 | 2022-10-25 10:55:02 +0100 | [diff] [blame] | 66 | }; |
| 67 | |||||
| 68 | &pmic { | ||||
| Simon Glass | d3a98cb | 2023-02-13 08:56:33 -0700 | [diff] [blame] | 69 | bootph-pre-ram; |
| Martyn Welch | 56f96e6 | 2022-10-25 10:55:02 +0100 | [diff] [blame] | 70 | }; |
| Fabio Estevam | 6184d13 | 2024-02-13 08:43:38 -0300 | [diff] [blame] | 71 | |
| 72 | &uart2 { | ||||
| 73 | bootph-pre-ram; | ||||
| 74 | }; | ||||
| 75 | |||||
| 76 | &pinctrl_uart2 { | ||||
| 77 | bootph-pre-ram; | ||||
| 78 | }; | ||||