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git01.mediatek.com / filogic / uboot / af6e2a784aed79dc58228f72dede8006c8e11da7 / . / arch / arm / dts / da850-evm-u-boot.dtsi
blob: 309130479a5386cfbe84f5e5830b72708a5fba6e [file] [log] [blame]
Tom Rini10e47792018-05-06 17:58:06 -0400[diff] [blame]1// SPDX-License-Identifier: GPL-2.0+
Adam Ford8c282b72017-09-17 20:43:44 -0500[diff] [blame]2/*
3 * da850-evm U-Boot Additions
4 *
5 * Copyright (C) 2017 Logic PD, Inc.
6 * Copyright (C) Adam Ford
Adam Ford8c282b72017-09-17 20:43:44 -0500[diff] [blame]7 */
8
Adam Ford200bc772019-02-25 21:53:47 -0600[diff] [blame]9/ {
10 soc@1c00000 {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]11 bootph-pre-ram;
Adam Ford200bc772019-02-25 21:53:47 -0600[diff] [blame]12 };
Bartosz Golaszewskif82db922019-07-29 08:58:05 +0200[diff] [blame]13
14 nand {
15 compatible = "ti,davinci-nand";
16 };
Dario Binacchi9b8c3202020-02-22 14:05:46 +0100[diff] [blame]17
18 panel {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]19 bootph-all;
Dario Binacchi9b8c3202020-02-22 14:05:46 +0100[diff] [blame]20 };
Adam Ford200bc772019-02-25 21:53:47 -0600[diff] [blame]21};
22
Adam Fordef184112019-07-30 08:32:37 -0500[diff] [blame]23&eth0 {
24 pinctrl-0 = <&mii_pins>, <&mdio_pins>;
25};
26
Adam Ford8c282b72017-09-17 20:43:44 -0500[diff] [blame]27&flash {
Neil Armstronga009fa72019-02-10 10:16:20 +0000[diff] [blame]28 compatible = "m25p64", "jedec,spi-nor";
Adam Ford8c282b72017-09-17 20:43:44 -0500[diff] [blame]29};
Adam Ford200bc772019-02-25 21:53:47 -0600[diff] [blame]30
31&mmc0 {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]32 bootph-pre-ram;
Adam Ford200bc772019-02-25 21:53:47 -0600[diff] [blame]33};
34
35&serial2 {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]36 bootph-pre-ram;
Adam Ford200bc772019-02-25 21:53:47 -0600[diff] [blame]37};
38
39&spi1 {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]40 bootph-pre-ram;
Adam Ford200bc772019-02-25 21:53:47 -0600[diff] [blame]41};
Walter Lozano6dc8d7e2020-06-25 01:10:15 -0300[diff] [blame]42
43&gpio {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]44 bootph-pre-ram;
Walter Lozano6dc8d7e2020-06-25 01:10:15 -0300[diff] [blame]45};