dts/upstream/src/riscv/starfive/jh7100-common.dtsi

// SPDX-License-Identifier: GPL-2.0 OR MIT
/*
 * Copyright (C) 2021 StarFive Technology Co., Ltd.
 * Copyright (C) 2021 Emil Renner Berthing <kernel@esmil.dk>
 */

/dts-v1/;
#include "jh7100.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/leds/common.h>
#include <dt-bindings/pinctrl/pinctrl-starfive-jh7100.h>

/ {
	aliases {
		mmc0 = &sdio0;
		mmc1 = &sdio1;
		serial0 = &uart3;
	};

	chosen {
		stdout-path = "serial0:115200n8";
	};

	cpus {
		timebase-frequency = <6250000>;
	};

	memory@80000000 {
		device_type = "memory";
		reg = <0x0 0x80000000 0x2 0x0>;
	};

	leds {
		compatible = "gpio-leds";

		led-ack {
			gpios = <&gpio 43 GPIO_ACTIVE_HIGH>;
			color = <LED_COLOR_ID_GREEN>;
			function = LED_FUNCTION_HEARTBEAT;
			linux,default-trigger = "heartbeat";
			label = "ack";
		};
	};

	reserved-memory {
		#address-cells = <2>;
		#size-cells = <2>;
		ranges;

		dma-reserved@fa000000 {
			reg = <0x0 0xfa000000 0x0 0x1000000>;
			no-map;
		};

		linux,dma@107a000000 {
			compatible = "shared-dma-pool";
			reg = <0x10 0x7a000000 0x0 0x1000000>;
			no-map;
			linux,dma-default;
		};
	};

	soc {
		dma-ranges = <0x00 0x80000000 0x00 0x80000000 0x00 0x7a000000>,
			     <0x00 0xfa000000 0x10 0x7a000000 0x00 0x01000000>,
			     <0x00 0xfb000000 0x00 0xfb000000 0x07 0x85000000>;
	};

	wifi_pwrseq: wifi-pwrseq {
		compatible = "mmc-pwrseq-simple";
		reset-gpios = <&gpio 37 GPIO_ACTIVE_LOW>;
	};
};

&gpio {
	i2c0_pins: i2c0-0 {
		i2c-pins {
			pinmux = <GPIOMUX(62, GPO_LOW,
				  GPO_I2C0_PAD_SCK_OEN,
				  GPI_I2C0_PAD_SCK_IN)>,
				 <GPIOMUX(61, GPO_LOW,
				  GPO_I2C0_PAD_SDA_OEN,
				  GPI_I2C0_PAD_SDA_IN)>;
			bias-disable; /* external pull-up */
			input-enable;
			input-schmitt-enable;
		};
	};

	i2c1_pins: i2c1-0 {
		i2c-pins {
			pinmux = <GPIOMUX(47, GPO_LOW,
				  GPO_I2C1_PAD_SCK_OEN,
				  GPI_I2C1_PAD_SCK_IN)>,
				 <GPIOMUX(48, GPO_LOW,
				  GPO_I2C1_PAD_SDA_OEN,
				  GPI_I2C1_PAD_SDA_IN)>;
			bias-pull-up;
			input-enable;
			input-schmitt-enable;
		};
	};

	i2c2_pins: i2c2-0 {
		i2c-pins {
			pinmux = <GPIOMUX(60, GPO_LOW,
				  GPO_I2C2_PAD_SCK_OEN,
				  GPI_I2C2_PAD_SCK_IN)>,
				 <GPIOMUX(59, GPO_LOW,
				  GPO_I2C2_PAD_SDA_OEN,
				  GPI_I2C2_PAD_SDA_IN)>;
			bias-disable; /* external pull-up */
			input-enable;
			input-schmitt-enable;
		};
	};

	sdio0_pins: sdio0-0 {
		clk-pins {
			pinmux = <GPIOMUX(54, GPO_SDIO0_PAD_CCLK_OUT,
				  GPO_ENABLE, GPI_NONE)>;
			bias-disable;
			input-disable;
			input-schmitt-disable;
		};
		sdio-pins {
			pinmux = <GPIOMUX(55, GPO_LOW, GPO_DISABLE,
				  GPI_SDIO0_PAD_CARD_DETECT_N)>,
				 <GPIOMUX(53,
				  GPO_SDIO0_PAD_CCMD_OUT,
				  GPO_SDIO0_PAD_CCMD_OEN,
				  GPI_SDIO0_PAD_CCMD_IN)>,
				 <GPIOMUX(49,
				  GPO_SDIO0_PAD_CDATA_OUT_BIT0,
				  GPO_SDIO0_PAD_CDATA_OEN_BIT0,
				  GPI_SDIO0_PAD_CDATA_IN_BIT0)>,
				 <GPIOMUX(50,
				  GPO_SDIO0_PAD_CDATA_OUT_BIT1,
				  GPO_SDIO0_PAD_CDATA_OEN_BIT1,
				  GPI_SDIO0_PAD_CDATA_IN_BIT1)>,
				 <GPIOMUX(51,
				  GPO_SDIO0_PAD_CDATA_OUT_BIT2,
				  GPO_SDIO0_PAD_CDATA_OEN_BIT2,
				  GPI_SDIO0_PAD_CDATA_IN_BIT2)>,
				 <GPIOMUX(52,
				  GPO_SDIO0_PAD_CDATA_OUT_BIT3,
				  GPO_SDIO0_PAD_CDATA_OEN_BIT3,
				  GPI_SDIO0_PAD_CDATA_IN_BIT3)>;
			bias-pull-up;
			input-enable;
			input-schmitt-enable;
		};
	};

	sdio1_pins: sdio1-0 {
		clk-pins {
			pinmux = <GPIOMUX(33, GPO_SDIO1_PAD_CCLK_OUT,
				  GPO_ENABLE, GPI_NONE)>;
			bias-disable;
			input-disable;
			input-schmitt-disable;
		};
		sdio-pins {
			pinmux = <GPIOMUX(29,
				  GPO_SDIO1_PAD_CCMD_OUT,
				  GPO_SDIO1_PAD_CCMD_OEN,
				  GPI_SDIO1_PAD_CCMD_IN)>,
				 <GPIOMUX(36,
				  GPO_SDIO1_PAD_CDATA_OUT_BIT0,
				  GPO_SDIO1_PAD_CDATA_OEN_BIT0,
				  GPI_SDIO1_PAD_CDATA_IN_BIT0)>,
				 <GPIOMUX(30,
				  GPO_SDIO1_PAD_CDATA_OUT_BIT1,
				  GPO_SDIO1_PAD_CDATA_OEN_BIT1,
				  GPI_SDIO1_PAD_CDATA_IN_BIT1)>,
				 <GPIOMUX(34,
				  GPO_SDIO1_PAD_CDATA_OUT_BIT2,
				  GPO_SDIO1_PAD_CDATA_OEN_BIT2,
				  GPI_SDIO1_PAD_CDATA_IN_BIT2)>,
				 <GPIOMUX(31,
				  GPO_SDIO1_PAD_CDATA_OUT_BIT3,
				  GPO_SDIO1_PAD_CDATA_OEN_BIT3,
				  GPI_SDIO1_PAD_CDATA_IN_BIT3)>;
			bias-pull-up;
			input-enable;
			input-schmitt-enable;
		};
	};

	uart3_pins: uart3-0 {
		rx-pins {
			pinmux = <GPIOMUX(13, GPO_LOW, GPO_DISABLE,
				  GPI_UART3_PAD_SIN)>;
			bias-pull-up;
			drive-strength = <14>;
			input-enable;
			input-schmitt-enable;
			slew-rate = <0>;
		};
		tx-pins {
			pinmux = <GPIOMUX(14, GPO_UART3_PAD_SOUT,
				  GPO_ENABLE, GPI_NONE)>;
			bias-disable;
			drive-strength = <35>;
			input-disable;
			input-schmitt-disable;
			slew-rate = <0>;
		};
	};
};

&i2c0 {
	clock-frequency = <100000>;
	i2c-sda-hold-time-ns = <300>;
	i2c-sda-falling-time-ns = <500>;
	i2c-scl-falling-time-ns = <500>;
	pinctrl-names = "default";
	pinctrl-0 = <&i2c0_pins>;
	status = "okay";

	pmic@5e {
		compatible = "ti,tps65086";
		reg = <0x5e>;
		gpio-controller;
		#gpio-cells = <2>;

		regulators {
		};
	};
};

&i2c1 {
	clock-frequency = <400000>;
	i2c-sda-hold-time-ns = <300>;
	i2c-sda-falling-time-ns = <100>;
	i2c-scl-falling-time-ns = <100>;
	pinctrl-names = "default";
	pinctrl-0 = <&i2c1_pins>;
	status = "okay";
};

&i2c2 {
	clock-frequency = <100000>;
	i2c-sda-hold-time-ns = <300>;
	i2c-sda-falling-time-ns = <500>;
	i2c-scl-falling-time-ns = <500>;
	pinctrl-names = "default";
	pinctrl-0 = <&i2c2_pins>;
	status = "okay";
};

&osc_sys {
	clock-frequency = <25000000>;
};

&osc_aud {
	clock-frequency = <27000000>;
};

&sdio0 {
	broken-cd;
	bus-width = <4>;
	cap-sd-highspeed;
	pinctrl-names = "default";
	pinctrl-0 = <&sdio0_pins>;
	status = "okay";
};

&sdio1 {
	#address-cells = <1>;
	#size-cells = <0>;
	bus-width = <4>;
	cap-sd-highspeed;
	cap-sdio-irq;
	cap-power-off-card;
	mmc-pwrseq = <&wifi_pwrseq>;
	non-removable;
	pinctrl-names = "default";
	pinctrl-0 = <&sdio1_pins>;
	status = "okay";

	wifi@1 {
		compatible = "brcm,bcm4329-fmac";
		reg = <1>;
	};
};

&uart3 {
	pinctrl-names = "default";
	pinctrl-0 = <&uart3_pins>;
	status = "okay";
};