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Tim Harvey295c8f92021-03-01 14:33:30 -08001// SPDX-License-Identifier: GPL-2.0-or-later
2/*
3 * Copyright 2014 Gateworks Corporation
4 */
5
6#include <dt-bindings/gpio/gpio.h>
7#include <dt-bindings/input/linux-event-codes.h>
8#include <dt-bindings/interrupt-controller/irq.h>
9
10/ {
11 /* these are used by bootloader for disabling nodes */
12 aliases {
13 led0 = &led0;
14 led1 = &led1;
15 led2 = &led2;
16 nand = &gpmi;
Tim Harvey69a53212021-07-24 10:40:36 -070017 usb0 = &usbotg;
18 usb1 = &usbh1;
Tim Harvey295c8f92021-03-01 14:33:30 -080019 };
20
21 chosen {
22 bootargs = "console=ttymxc1,115200";
23 };
24
25 gpio-keys {
26 compatible = "gpio-keys";
27 #address-cells = <1>;
28 #size-cells = <0>;
29
30 user-pb {
31 label = "user_pb";
32 gpios = <&gsc_gpio 0 GPIO_ACTIVE_LOW>;
33 linux,code = <BTN_0>;
34 };
35
36 user-pb1x {
37 label = "user_pb1x";
38 linux,code = <BTN_1>;
39 interrupt-parent = <&gsc>;
40 interrupts = <0>;
41 };
42
43 key-erased {
44 label = "key-erased";
45 linux,code = <BTN_2>;
46 interrupt-parent = <&gsc>;
47 interrupts = <1>;
48 };
49
50 eeprom-wp {
51 label = "eeprom_wp";
52 linux,code = <BTN_3>;
53 interrupt-parent = <&gsc>;
54 interrupts = <2>;
55 };
56
57 tamper {
58 label = "tamper";
59 linux,code = <BTN_4>;
60 interrupt-parent = <&gsc>;
61 interrupts = <5>;
62 };
63
64 switch-hold {
65 label = "switch_hold";
66 linux,code = <BTN_5>;
67 interrupt-parent = <&gsc>;
68 interrupts = <7>;
69 };
70 };
71
72 leds {
73 compatible = "gpio-leds";
74 pinctrl-names = "default";
75 pinctrl-0 = <&pinctrl_gpio_leds>;
76
77 led0: user1 {
78 label = "user1";
79 gpios = <&gpio4 6 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDG */
80 default-state = "on";
81 linux,default-trigger = "heartbeat";
82 };
83
84 led1: user2 {
85 label = "user2";
86 gpios = <&gpio4 7 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDR */
87 default-state = "off";
88 };
89
90 led2: user3 {
91 label = "user3";
92 gpios = <&gpio4 15 GPIO_ACTIVE_LOW>; /* MX6_LOCLED# */
93 default-state = "off";
94 };
95 };
96
97 memory@10000000 {
98 device_type = "memory";
99 reg = <0x10000000 0x20000000>;
100 };
101
102 reg_1p0v: regulator-1p0v {
103 compatible = "regulator-fixed";
104 regulator-name = "1P0V";
105 regulator-min-microvolt = <1000000>;
106 regulator-max-microvolt = <1000000>;
107 regulator-always-on;
108 };
109
110 reg_3p3v: regulator-3p3v {
111 compatible = "regulator-fixed";
112 regulator-name = "3P3V";
113 regulator-min-microvolt = <3300000>;
114 regulator-max-microvolt = <3300000>;
115 regulator-always-on;
116 };
117
118 reg_5p0v: regulator-5p0v {
119 compatible = "regulator-fixed";
120 regulator-name = "5P0V";
121 regulator-min-microvolt = <5000000>;
122 regulator-max-microvolt = <5000000>;
Tim Harvey295c8f92021-03-01 14:33:30 -0800123 };
Tim Harvey469611e2021-09-29 15:04:22 -0700124
125 reg_usb_h1_vbus: regulator-usbh1-vbus {
126 compatible = "regulator-fixed";
127 regulator-name = "usb_h1_vbus";
128 regulator-min-microvolt = <5000000>;
129 regulator-max-microvolt = <5000000>;
130 gpio = <&gpio1 9 GPIO_ACTIVE_HIGH>;
131 enable-active-high;
132 };
Tim Harvey295c8f92021-03-01 14:33:30 -0800133};
134
135&gpmi {
136 pinctrl-names = "default";
137 pinctrl-0 = <&pinctrl_gpmi_nand>;
138 status = "okay";
139};
140
141&hdmi {
142 ddc-i2c-bus = <&i2c3>;
143 status = "okay";
144};
145
146&i2c1 {
147 clock-frequency = <100000>;
148 pinctrl-names = "default";
149 pinctrl-0 = <&pinctrl_i2c1>;
150 status = "okay";
151
152 gsc: gsc@20 {
153 compatible = "gw,gsc";
154 reg = <0x20>;
155 interrupt-parent = <&gpio1>;
156 interrupts = <4 IRQ_TYPE_LEVEL_LOW>;
157 interrupt-controller;
158 #interrupt-cells = <1>;
159 #size-cells = <0>;
160
161 adc {
162 compatible = "gw,gsc-adc";
163 #address-cells = <1>;
164 #size-cells = <0>;
165
166 channel@0 {
167 gw,mode = <0>;
168 reg = <0x00>;
169 label = "temp";
170 };
171
172 channel@2 {
173 gw,mode = <1>;
174 reg = <0x02>;
175 label = "vdd_vin";
176 };
177
178 channel@5 {
179 gw,mode = <1>;
180 reg = <0x05>;
181 label = "vdd_3p3";
182 };
183
184 channel@8 {
185 gw,mode = <1>;
186 reg = <0x08>;
187 label = "vdd_bat";
188 };
189
190 channel@b {
191 gw,mode = <1>;
192 reg = <0x0b>;
193 label = "vdd_5p0";
194 };
195
196 channel@e {
197 gw,mode = <1>;
198 reg = <0xe>;
199 label = "vdd_arm";
200 };
201
202 channel@11 {
203 gw,mode = <1>;
204 reg = <0x11>;
205 label = "vdd_soc";
206 };
207
208 channel@14 {
209 gw,mode = <1>;
210 reg = <0x14>;
211 label = "vdd_3p0";
212 };
213
214 channel@17 {
215 gw,mode = <1>;
216 reg = <0x17>;
217 label = "vdd_1p5";
218 };
219
220 channel@1d {
221 gw,mode = <1>;
222 reg = <0x1d>;
223 label = "vdd_1p8";
224 };
225
226 channel@20 {
227 gw,mode = <1>;
228 reg = <0x20>;
229 label = "vdd_1p0";
230 };
231
232 channel@23 {
233 gw,mode = <1>;
234 reg = <0x23>;
235 label = "vdd_2p5";
236 };
237 };
238 };
239
240 gsc_gpio: gpio@23 {
241 compatible = "nxp,pca9555";
242 reg = <0x23>;
243 gpio-controller;
244 #gpio-cells = <2>;
245 interrupt-parent = <&gsc>;
246 interrupts = <4>;
247 };
248
249 eeprom1: eeprom@50 {
250 compatible = "atmel,24c02";
251 reg = <0x50>;
252 pagesize = <16>;
253 };
254
255 eeprom2: eeprom@51 {
256 compatible = "atmel,24c02";
257 reg = <0x51>;
258 pagesize = <16>;
259 };
260
261 eeprom3: eeprom@52 {
262 compatible = "atmel,24c02";
263 reg = <0x52>;
264 pagesize = <16>;
265 };
266
267 eeprom4: eeprom@53 {
268 compatible = "atmel,24c02";
269 reg = <0x53>;
270 pagesize = <16>;
271 };
272
273 rtc: ds1672@68 {
274 compatible = "dallas,ds1672";
275 reg = <0x68>;
276 };
277};
278
279&i2c2 {
280 clock-frequency = <100000>;
281 pinctrl-names = "default";
282 pinctrl-0 = <&pinctrl_i2c2>;
283 status = "okay";
284
285 ltc3676: pmic@3c {
286 compatible = "lltc,ltc3676";
287 reg = <0x3c>;
288 pinctrl-names = "default";
289 pinctrl-0 = <&pinctrl_pmic>;
290 interrupt-parent = <&gpio1>;
291 interrupts = <8 IRQ_TYPE_EDGE_FALLING>;
292
293 regulators {
294 /* VDD_SOC (1+R1/R2 = 1.635) */
295 reg_vdd_soc: sw1 {
296 regulator-name = "vddsoc";
297 regulator-min-microvolt = <674400>;
298 regulator-max-microvolt = <1308000>;
299 lltc,fb-voltage-divider = <127000 200000>;
300 regulator-ramp-delay = <7000>;
301 regulator-boot-on;
302 regulator-always-on;
303 };
304
305 /* VDD_1P8 (1+R1/R2 = 2.505): ENET-PHY */
306 reg_1p8v: sw2 {
307 regulator-name = "vdd1p8";
308 regulator-min-microvolt = <1033310>;
309 regulator-max-microvolt = <2004000>;
310 lltc,fb-voltage-divider = <301000 200000>;
311 regulator-ramp-delay = <7000>;
312 regulator-boot-on;
313 regulator-always-on;
314 };
315
316 /* VDD_ARM (1+R1/R2 = 1.635) */
317 reg_vdd_arm: sw3 {
318 regulator-name = "vddarm";
319 regulator-min-microvolt = <674400>;
320 regulator-max-microvolt = <1308000>;
321 lltc,fb-voltage-divider = <127000 200000>;
322 regulator-ramp-delay = <7000>;
323 regulator-boot-on;
324 regulator-always-on;
325 };
326
327 /* VDD_DDR (1+R1/R2 = 2.105) */
328 reg_vdd_ddr: sw4 {
329 regulator-name = "vddddr";
330 regulator-min-microvolt = <868310>;
331 regulator-max-microvolt = <1684000>;
332 lltc,fb-voltage-divider = <221000 200000>;
333 regulator-ramp-delay = <7000>;
334 regulator-boot-on;
335 regulator-always-on;
336 };
337
338 /* VDD_2P5 (1+R1/R2 = 3.435): PCIe/ENET-PHY */
339 reg_2p5v: ldo2 {
340 regulator-name = "vdd2p5";
341 regulator-min-microvolt = <2490375>;
342 regulator-max-microvolt = <2490375>;
343 lltc,fb-voltage-divider = <487000 200000>;
344 regulator-boot-on;
345 regulator-always-on;
346 };
347
348 /* VDD_HIGH (1+R1/R2 = 4.17) */
349 reg_3p0v: ldo4 {
350 regulator-name = "vdd3p0";
351 regulator-min-microvolt = <3023250>;
352 regulator-max-microvolt = <3023250>;
353 lltc,fb-voltage-divider = <634000 200000>;
354 regulator-boot-on;
355 regulator-always-on;
356 };
357 };
358 };
359};
360
361&i2c3 {
362 clock-frequency = <100000>;
363 pinctrl-names = "default";
364 pinctrl-0 = <&pinctrl_i2c3>;
365 status = "okay";
366};
367
368&pcie {
369 pinctrl-names = "default";
370 pinctrl-0 = <&pinctrl_pcie>;
371 reset-gpio = <&gpio1 29 GPIO_ACTIVE_LOW>;
372 status = "okay";
373};
374
375&pwm2 {
376 pinctrl-names = "default";
377 pinctrl-0 = <&pinctrl_pwm2>; /* MX6_DIO1 */
378 status = "disabled";
379};
380
381&pwm3 {
382 pinctrl-names = "default";
383 pinctrl-0 = <&pinctrl_pwm3>; /* MX6_DIO2 */
384 status = "disabled";
385};
386
387&uart2 {
388 pinctrl-names = "default";
389 pinctrl-0 = <&pinctrl_uart2>;
390 status = "okay";
391};
392
393&uart3 {
394 pinctrl-names = "default";
395 pinctrl-0 = <&pinctrl_uart3>;
396 status = "okay";
397};
398
399&uart5 {
400 pinctrl-names = "default";
401 pinctrl-0 = <&pinctrl_uart5>;
Tim Harvey469611e2021-09-29 15:04:22 -0700402 status = "okay";
403};
Tim Harvey295c8f92021-03-01 14:33:30 -0800404
405&usbh1 {
Tim Harvey469611e2021-09-29 15:04:22 -0700406 vbus-supply = <&reg_usb_h1_vbus>;
407 pinctrl-names = "default";
408 pinctrl-0 = <&pinctrl_usbh1>;
Tim Harvey295c8f92021-03-01 14:33:30 -0800409 status = "okay";
410};
411
412&usbotg {
413 vbus-supply = <&reg_5p0v>;
414 pinctrl-names = "default";
415 pinctrl-0 = <&pinctrl_usbotg>;
416 disable-over-current;
Tim Harvey3deb9892021-03-01 14:33:31 -0800417 dr_mode = "otg";
Tim Harvey295c8f92021-03-01 14:33:30 -0800418 status = "okay";
419};
420
421&wdog1 {
422 pinctrl-names = "default";
423 pinctrl-0 = <&pinctrl_wdog>;
424 fsl,ext-reset-output;
425};
426
427&iomuxc {
428 pinctrl_gpio_leds: gpioledsgrp {
429 fsl,pins = <
430 MX6QDL_PAD_KEY_COL0__GPIO4_IO06 0x1b0b0
431 MX6QDL_PAD_KEY_ROW0__GPIO4_IO07 0x1b0b0
432 MX6QDL_PAD_KEY_ROW4__GPIO4_IO15 0x1b0b0
433 >;
434 };
435
436 pinctrl_gpmi_nand: gpminandgrp {
437 fsl,pins = <
438 MX6QDL_PAD_NANDF_CLE__NAND_CLE 0xb0b1
439 MX6QDL_PAD_NANDF_ALE__NAND_ALE 0xb0b1
440 MX6QDL_PAD_NANDF_WP_B__NAND_WP_B 0xb0b1
441 MX6QDL_PAD_NANDF_RB0__NAND_READY_B 0xb000
442 MX6QDL_PAD_NANDF_CS0__NAND_CE0_B 0xb0b1
443 MX6QDL_PAD_SD4_CMD__NAND_RE_B 0xb0b1
444 MX6QDL_PAD_SD4_CLK__NAND_WE_B 0xb0b1
445 MX6QDL_PAD_NANDF_D0__NAND_DATA00 0xb0b1
446 MX6QDL_PAD_NANDF_D1__NAND_DATA01 0xb0b1
447 MX6QDL_PAD_NANDF_D2__NAND_DATA02 0xb0b1
448 MX6QDL_PAD_NANDF_D3__NAND_DATA03 0xb0b1
449 MX6QDL_PAD_NANDF_D4__NAND_DATA04 0xb0b1
450 MX6QDL_PAD_NANDF_D5__NAND_DATA05 0xb0b1
451 MX6QDL_PAD_NANDF_D6__NAND_DATA06 0xb0b1
452 MX6QDL_PAD_NANDF_D7__NAND_DATA07 0xb0b1
453 >;
454 };
455
456 pinctrl_i2c1: i2c1grp {
457 fsl,pins = <
458 MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
459 MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
460 MX6QDL_PAD_GPIO_4__GPIO1_IO04 0xb0b1
461 >;
462 };
463
464 pinctrl_i2c2: i2c2grp {
465 fsl,pins = <
466 MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
467 MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
468 >;
469 };
470
471 pinctrl_i2c3: i2c3grp {
472 fsl,pins = <
473 MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1
474 MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1
475 >;
476 };
477
478 pinctrl_pcie: pciegrp {
479 fsl,pins = <
480 MX6QDL_PAD_ENET_TXD1__GPIO1_IO29 0x1b0b0
481 >;
482 };
483
484 pinctrl_pmic: pmicgrp {
485 fsl,pins = <
486 MX6QDL_PAD_GPIO_8__GPIO1_IO08 0x0001b0b0 /* PMIC_IRQ# */
487 >;
488 };
489
490 pinctrl_pwm2: pwm2grp {
491 fsl,pins = <
492 MX6QDL_PAD_SD1_DAT2__PWM2_OUT 0x1b0b1
493 >;
494 };
495
496 pinctrl_pwm3: pwm3grp {
497 fsl,pins = <
498 MX6QDL_PAD_SD1_DAT1__PWM3_OUT 0x1b0b1
499 >;
500 };
501
502 pinctrl_uart2: uart2grp {
503 fsl,pins = <
504 MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA 0x1b0b1
505 MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA 0x1b0b1
506 >;
507 };
508
509 pinctrl_uart3: uart3grp {
510 fsl,pins = <
511 MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b1
512 MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b0b1
513 >;
514 };
515
516 pinctrl_uart5: uart5grp {
517 fsl,pins = <
518 MX6QDL_PAD_KEY_COL1__UART5_TX_DATA 0x1b0b1
519 MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA 0x1b0b1
520 >;
521 };
522
Tim Harvey469611e2021-09-29 15:04:22 -0700523 pinctrl_usbh1: usbh1grp {
524 fsl,pins = <
525 MX6QDL_PAD_GPIO_9__GPIO1_IO09 0x1b0b0
526 >;
527 };
528
Tim Harvey295c8f92021-03-01 14:33:30 -0800529 pinctrl_usbotg: usbotggrp {
530 fsl,pins = <
531 MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID 0x13059
532 >;
533 };
534
535 pinctrl_wdog: wdoggrp {
536 fsl,pins = <
537 MX6QDL_PAD_DISP0_DAT8__WDOG1_B 0x1b0b0
538 >;
539 };
540};