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git01.mediatek.com / filogic / uboot / aefb78d83db39fec9b81b44eccf277b218ccbfe0 / . / arch / arm / mach-uniphier / ph1-ld4 / clkrst_init.c
blob: 2de81f0a5609c7de807724d1fcea43ed0798a31b [file] [log] [blame]
Masahiro Yamadabb2ff9d2014-10-03 19:21:06 +0900[diff] [blame]1/*
Masahiro Yamada663a23f2015-05-29 17:30:00 +0900[diff] [blame]2 * Copyright (C) 2011-2015 Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamadabb2ff9d2014-10-03 19:21:06 +0900[diff] [blame]3 *
4 * SPDX-License-Identifier: GPL-2.0+
5 */
6
Masahiro Yamada663a23f2015-05-29 17:30:00 +0900[diff] [blame]7#include <linux/io.h>
Masahiro Yamada95387e22015-02-27 02:26:44 +0900[diff] [blame]8#include <mach/sc-regs.h>
Masahiro Yamadabb2ff9d2014-10-03 19:21:06 +0900[diff] [blame]9
10void clkrst_init(void)
11{
12 u32 tmp;
13
14 /* deassert reset */
15 tmp = readl(SC_RSTCTRL);
Masahiro Yamadac04368f2015-02-27 02:26:51 +0900[diff] [blame]16#ifdef CONFIG_UNIPHIER_ETH
17 tmp |= SC_RSTCTRL_NRST_ETHER;
18#endif
Masahiro Yamada36563e62015-02-27 02:26:53 +0900[diff] [blame]19#ifdef CONFIG_USB_EHCI_UNIPHIER
20 tmp |= SC_RSTCTRL_NRST_STDMAC;
21#endif
Masahiro Yamadac04368f2015-02-27 02:26:51 +0900[diff] [blame]22#ifdef CONFIG_NAND_DENALI
23 tmp |= SC_RSTCTRL_NRST_NAND;
24#endif
Masahiro Yamadabb2ff9d2014-10-03 19:21:06 +0900[diff] [blame]25 writel(tmp, SC_RSTCTRL);
26 readl(SC_RSTCTRL); /* dummy read */
27
28 /* privide clocks */
29 tmp = readl(SC_CLKCTRL);
Masahiro Yamadac04368f2015-02-27 02:26:51 +0900[diff] [blame]30#ifdef CONFIG_UNIPHIER_ETH
31 tmp |= SC_CLKCTRL_CEN_ETHER;
32#endif
33#ifdef CONFIG_USB_EHCI_UNIPHIER
Masahiro Yamada36563e62015-02-27 02:26:53 +0900[diff] [blame]34 tmp |= SC_CLKCTRL_CEN_MIO | SC_CLKCTRL_CEN_STDMAC;
Masahiro Yamadac04368f2015-02-27 02:26:51 +0900[diff] [blame]35#endif
36#ifdef CONFIG_NAND_DENALI
37 tmp |= SC_CLKCTRL_CEN_NAND;
38#endif
Masahiro Yamadabb2ff9d2014-10-03 19:21:06 +0900[diff] [blame]39 writel(tmp, SC_CLKCTRL);
40 readl(SC_CLKCTRL); /* dummy read */
41}