blob: 2bf48175ef6f58db530cd710da241e14cb8a16f3 [file] [log] [blame]
John Tobias6a941a32014-11-12 14:27:42 -08001/*
2 * Copyright (C) 2011 Freescale Semiconductor, Inc.
3 * Jason Liu <r64343@freescale.com>
4 *
5 * SPDX-License-Identifier: GPL-2.0+
6 *
7 * Refer doc/README.imximage for more details about how-to configure
8 * and create imximage boot image
9 *
10 * The syntax is taken as close as possible with the kwbimage
11 */
12
13/* image version */
14IMAGE_VERSION 2
15
16/*
17 * Boot Device : one of
18 * spi, sd (the board has no nand neither onenand)
19 */
20BOOT_FROM sd
21
22/*
23 * Device Configuration Data (DCD)
24 *
25 * Each entry must have the format:
26 * Addr-type Address Value
27 *
28 * where:
29 * Addr-type register length (1,2 or 4 bytes)
30 * Address absolute address of the register
31 * value value to be stored in the register
32 */
33
34/* set the default clock gate to save power */
35DATA 4 0x020c4068 0x00C03F3F
36DATA 4 0x020c406c 0x0030FC03
37DATA 4 0x020c4070 0x0FFFC000
38DATA 4 0x020c4074 0x3FF00000
39DATA 4 0x020c4078 0x00FFF300
40DATA 4 0x020c407c 0x0F0000C3
41DATA 4 0x020c4080 0x000003FF
42
43/* enable AXI cache for VDOA/VPU/IPU */
44DATA 4 0x020e0010 0xF00000CF
45/* set IPU AXI-id0 Qos=0xf(bypass) AXI-id1 Qos=0x7 */
46DATA 4 0x020e0018 0x007F007F
47DATA 4 0x020e001c 0x007F007F
48
49/*
50 * Setup CCM_CCOSR register as follows:
51 *
52 * cko1_en = 1 --> CKO1 enabled
53 * cko1_div = 111 --> divide by 8
54 * cko1_sel = 1011 --> ahb_clk_root
55 *
56 * This sets CKO1 at ahb_clk_root/8 = 132/8 = 16.5 MHz
57 */
58DATA 4 0x020c4060 0x000000fb