blob: 9c478837ba44c61499c26b514db821ea40c16db2 [file] [log] [blame]
Tom Rini10e47792018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0
Simon Glassb1398362015-08-03 08:19:37 -06002/*
3 * Google Spring board device tree source
4 *
5 * Copyright (c) 2013 Google, Inc
6 * Copyright (c) 2014 SUSE LINUX Products GmbH
Simon Glassb1398362015-08-03 08:19:37 -06007 */
8
9/dts-v1/;
10#include <dt-bindings/gpio/gpio.h>
11#include <dt-bindings/interrupt-controller/irq.h>
12#include <dt-bindings/input/input.h>
13#include "exynos5250.dtsi"
14
15/ {
16 model = "Google Spring";
17 compatible = "google,spring", "samsung,exynos5250", "samsung,exynos5";
18
19 aliases {
20 i2c0 = "/i2c@12C60000";
21 i2c1 = "/i2c@12C70000";
22 i2c2 = "/i2c@12C80000";
23 i2c3 = "/i2c@12C90000";
24 i2c4 = "/i2c@12CA0000";
25 i2c5 = "/i2c@12CB0000";
26 i2c6 = "/i2c@12CC0000";
27 i2c7 = "/i2c@12CD0000";
28 i2c104 = &cros_ec_ldo_tunnel;
29 spi0 = "/spi@12d20000";
30 spi1 = "/spi@12d30000";
31 spi2 = "/spi@12d40000";
32 spi3 = "/spi@131a0000";
33 spi4 = "/spi@131b0000";
Minkyu Kangbac07eb2018-07-27 16:59:24 +090034 mmc0 = "/mmc@12200000";
Simon Glassb1398362015-08-03 08:19:37 -060035 serial0 = "/serial@12C30000";
36 console = "/serial@12C30000";
Simon Glassb1398362015-08-03 08:19:37 -060037 };
38
39 memory {
40 reg = <0x40000000 0x80000000>;
41 };
42
Simon Glass98b2d772019-01-11 18:37:11 -070043 iram {
44 reg = <0x02020000 0x60000>;
45 };
46
47 config {
48 samsung,bl1-offset = <0x1400>;
49 samsung,bl2-offset = <0x3400>;
50 u-boot-memory = "/memory";
51 u-boot-offset = <0x3e00000 0x100000>;
52 };
53
Simon Glassb1398362015-08-03 08:19:37 -060054 flash@0 {
Simon Glass98b2d772019-01-11 18:37:11 -070055 reg = <0 0x100000>;
56 #address-cells = <1>;
57 #size-cells = <1>;
58 pre-boot {
59 label = "bl1 pre-boot";
60 reg = <0 0x2000>;
61 read-only;
62 filename = "e5250.nbl1.bin";
63 type = "blob exynos-bl1";
64 required;
65 };
66
67 spl {
68 label = "bl2 spl";
69 reg = <0x2000 0x8000>;
70 read-only;
71 filename = "bl2.bin";
72 type = "blob exynos-bl2 boot,dtb";
73 payload = "/flash/ro-boot";
74 required;
75 };
76
77 ro-boot {
78 label = "u-boot";
79 reg = <0xa000 0xb0000>;
80 read-only;
81 type = "blob boot,dtb";
82 required;
Simon Glassb1398362015-08-03 08:19:37 -060083 };
84 };
85
86 chosen {
87 bootargs = "console=tty1";
88 stdout-path = "serial3:115200n8";
89 };
90
91 board-rev {
92 compatible = "google,board-revision";
93 google,board-rev-gpios = <&gpy4 0 0>, <&gpy4 1 0>,
94 <&gpy4 2 0>;
95 };
96
Simon Glass11328532015-08-22 18:31:37 -060097 i2c@12C90000 {
98 clock-frequency = <100000>;
99 tpm@20 {
100 reg = <0x20>;
101 compatible = "infineon,slb9645tt";
102 };
103 };
104
Simon Glassb1398362015-08-03 08:19:37 -0600105 mmc@12200000 {
Sam Protsenkob0ed27b2024-08-07 22:14:20 -0500106 bus-width = <8>;
Sam Protsenkob0ed27b2024-08-07 22:14:20 -0500107 samsung,dw-mshc-ciu-div = <3>;
108 samsung,dw-mshc-sdr-timing = <1 3>;
Sam Protsenkob0ed27b2024-08-07 22:14:20 -0500109 non-removable;
Simon Glassb1398362015-08-03 08:19:37 -0600110 };
111
112 mmc@12210000 {
113 status = "disabled";
114 };
115
116 mmc@12220000 {
117 /* MMC2 pins are used as GPIO for eDP bridge */
118 status = "disabled";
119 };
120
121 mmc@12230000 {
122 status = "disabled";
123 };
124
125 ehci@12110000 {
126 samsung,vbus-gpio = <&gpx1 1 GPIO_ACTIVE_HIGH>;
127 status = "okay";
128 };
129
130 xhci@12000000 {
131 samsung,vbus-gpio = <&gpx2 7 GPIO_ACTIVE_HIGH>;
132 };
133
Simon Glassaf317482019-01-11 18:37:10 -0700134 sound {
135 compatible = "google,spring-audio-max98088";
136
137 samsung,model = "Spring-I2S-MAX98088";
138 samsung,audio-codec = <&max98088>;
139 codec-enable-gpio = <&gpx1 7 0>;
140
141 cpu {
142 sound-dai = <&i2s1 0>;
143 };
144
145 codec {
146 sound-dai = <&max98088 0>;
147 };
148 };
149
Simon Glassb1398362015-08-03 08:19:37 -0600150 spi@12d30000 {
151 spi-max-frequency = <50000000>;
152 firmware_storage_spi: flash@0 {
Neil Armstronga009fa72019-02-10 10:16:20 +0000153 compatible = "jedec,spi-nor";
Simon Glassb1398362015-08-03 08:19:37 -0600154 reg = <0>;
155 };
156 };
157
158 tmu@10060000 {
159 samsung,min-temp = <25>;
160 samsung,max-temp = <125>;
161 samsung,start-warning = <95>;
162 samsung,start-tripping = <105>;
163 samsung,hw-tripping = <110>;
164 samsung,efuse-min-value = <40>;
165 samsung,efuse-value = <55>;
166 samsung,efuse-max-value = <100>;
167 samsung,slope = <274761730>;
168 samsung,dc-value = <25>;
169 };
170
171 fimd@14400000 {
172 samsung,vl-freq = <60>;
173 samsung,vl-col = <1366>;
174 samsung,vl-row = <768>;
175 samsung,vl-width = <1366>;
176 samsung,vl-height = <768>;
177
178 samsung,vl-clkp;
179 samsung,vl-dp;
180 samsung,vl-hsp;
181 samsung,vl-vsp;
182
183 samsung,vl-bpix = <4>;
184
185 samsung,vl-hspw = <32>;
186 samsung,vl-hbpd = <80>;
187 samsung,vl-hfpd = <48>;
188 samsung,vl-vspw = <5>;
189 samsung,vl-vbpd = <14>;
190 samsung,vl-vfpd = <3>;
191 samsung,vl-cmd-allow-len = <0xf>;
192
193 samsung,winid = <0>;
194 samsung,interface-mode = <1>;
195 samsung,dp-enabled = <1>;
196 samsung,dual-lcd-enabled = <0>;
197 };
198
199 dp@145b0000 {
200 samsung,lt-status = <0>;
201
202 samsung,master-mode = <0>;
203 samsung,bist-mode = <0>;
204 samsung,bist-pattern = <0>;
205 samsung,h-sync-polarity = <0>;
206 samsung,v-sync-polarity = <0>;
207 samsung,interlaced = <0>;
208 samsung,color-space = <0>;
209 samsung,dynamic-range = <0>;
210 samsung,ycbcr-coeff = <0>;
211 samsung,color-depth = <1>;
212 };
Simon Glass67063672016-02-21 21:08:58 -0700213
214 backlight: backlight {
215 compatible = "pwm-backlight";
216 pwms = <&pwm 0 1000000 0>;
217 brightness-levels = <0 100 500 1000 1500 2000 2500 2800>;
218 default-brightness-level = <1>;
219 enable-gpios = <&gpx3 0 GPIO_ACTIVE_HIGH>;
220 power-supply = <&fet1>;
221 };
222
223 panel: panel {
224 compatible = "auo,b116xw03";
225 power-supply = <&fet6>;
226 backlight = <&backlight>;
227
228 port {
229 panel_in: endpoint {
230 remote-endpoint = <&bridge_out>;
231 };
232 };
233 };
Simon Glassb1398362015-08-03 08:19:37 -0600234};
235
236&i2c_0 {
237 status = "okay";
238 samsung,i2c-sda-delay = <100>;
239 samsung,i2c-max-bus-freq = <378000>;
240
241 s5m8767-pmic@66 {
242 compatible = "samsung,s5m8767-pmic";
243 reg = <0x66>;
244 interrupt-parent = <&gpx3>;
245 wakeup-source;
246
247 s5m8767,pmic-buck-dvs-gpios = <&gpd1 0 GPIO_ACTIVE_LOW>, /* DVS1 */
248 <&gpd1 1 GPIO_ACTIVE_LOW>, /* DVS2 */
249 <&gpd1 2 GPIO_ACTIVE_LOW>; /* DVS3 */
250
251 s5m8767,pmic-buck-ds-gpios = <&gpx2 3 GPIO_ACTIVE_LOW>, /* SET1 */
252 <&gpx2 4 GPIO_ACTIVE_LOW>, /* SET2 */
253 <&gpx2 5 GPIO_ACTIVE_LOW>; /* SET3 */
254
255 /*
256 * The following arrays of DVS voltages are not used, since we are
257 * not using GPIOs to control PMIC bucks, but they must be defined
258 * to please the driver.
259 */
260 s5m8767,pmic-buck2-dvs-voltage = <1350000>, <1300000>,
261 <1250000>, <1200000>,
262 <1150000>, <1100000>,
263 <1000000>, <950000>;
264
265 s5m8767,pmic-buck3-dvs-voltage = <1100000>, <1100000>,
266 <1100000>, <1100000>,
267 <1000000>, <1000000>,
268 <1000000>, <1000000>;
269
270 s5m8767,pmic-buck4-dvs-voltage = <1200000>, <1200000>,
271 <1200000>, <1200000>,
272 <1200000>, <1200000>,
273 <1200000>, <1200000>;
274
275 clocks {
276 compatible = "samsung,s5m8767-clk";
277 #clock-cells = <1>;
278 clock-output-names = "en32khz_ap",
279 "en32khz_cp",
280 "en32khz_bt";
281 };
282
283 regulators {
284 ldo4_reg: LDO4 {
285 regulator-name = "P1.0V_LDO_OUT4";
286 regulator-min-microvolt = <1000000>;
287 regulator-max-microvolt = <1000000>;
288 regulator-always-on;
289 op_mode = <0>;
290 };
291
292 ldo5_reg: LDO5 {
293 regulator-name = "P1.8V_LDO_OUT5";
294 regulator-min-microvolt = <1800000>;
295 regulator-max-microvolt = <1800000>;
296 regulator-always-on;
297 op_mode = <0>;
298 };
299
300 ldo6_reg: LDO6 {
301 regulator-name = "vdd_mydp";
302 regulator-min-microvolt = <1200000>;
303 regulator-max-microvolt = <1200000>;
304 regulator-always-on;
305 op_mode = <3>;
306 };
307
308 ldo7_reg: LDO7 {
309 regulator-name = "P1.1V_LDO_OUT7";
310 regulator-min-microvolt = <1100000>;
311 regulator-max-microvolt = <1100000>;
312 regulator-always-on;
313 op_mode = <3>;
314 };
315
316 ldo8_reg: LDO8 {
317 regulator-name = "P1.0V_LDO_OUT8";
318 regulator-min-microvolt = <1000000>;
319 regulator-max-microvolt = <1000000>;
320 regulator-always-on;
321 op_mode = <3>;
322 };
323
324 ldo10_reg: LDO10 {
325 regulator-name = "P1.8V_LDO_OUT10";
326 regulator-min-microvolt = <1800000>;
327 regulator-max-microvolt = <1800000>;
328 regulator-always-on;
329 op_mode = <3>;
330 };
331
332 ldo11_reg: LDO11 {
333 regulator-name = "P1.8V_LDO_OUT11";
334 regulator-min-microvolt = <1800000>;
335 regulator-max-microvolt = <1800000>;
336 regulator-always-on;
337 op_mode = <0>;
338 };
339
340 ldo12_reg: LDO12 {
341 regulator-name = "P3.0V_LDO_OUT12";
342 regulator-min-microvolt = <3000000>;
343 regulator-max-microvolt = <3000000>;
344 regulator-always-on;
345 op_mode = <3>;
346 };
347
348 ldo13_reg: LDO13 {
349 regulator-name = "P1.8V_LDO_OUT13";
350 regulator-min-microvolt = <1800000>;
351 regulator-max-microvolt = <1800000>;
352 regulator-always-on;
353 op_mode = <0>;
354 };
355
356 ldo14_reg: LDO14 {
357 regulator-name = "P1.8V_LDO_OUT14";
358 regulator-min-microvolt = <1800000>;
359 regulator-max-microvolt = <1800000>;
360 regulator-always-on;
361 op_mode = <3>;
362 };
363
364 ldo15_reg: LDO15 {
365 regulator-name = "P1.0V_LDO_OUT15";
366 regulator-min-microvolt = <1000000>;
367 regulator-max-microvolt = <1000000>;
368 regulator-always-on;
369 op_mode = <3>;
370 };
371
372 ldo16_reg: LDO16 {
373 regulator-name = "P1.8V_LDO_OUT16";
374 regulator-min-microvolt = <1800000>;
375 regulator-max-microvolt = <1800000>;
376 regulator-always-on;
377 op_mode = <3>;
378 };
379
380 ldo17_reg: LDO17 {
381 regulator-name = "P1.2V_LDO_OUT17";
382 regulator-min-microvolt = <1200000>;
383 regulator-max-microvolt = <1200000>;
384 regulator-always-on;
385 op_mode = <0>;
386 };
387
388 ldo25_reg: LDO25 {
389 regulator-name = "vdd_bridge";
390 regulator-min-microvolt = <1200000>;
391 regulator-max-microvolt = <1200000>;
392 regulator-always-on;
393 op_mode = <1>;
394 };
395
396 buck1_reg: BUCK1 {
397 regulator-name = "vdd_mif";
398 regulator-min-microvolt = <950000>;
399 regulator-max-microvolt = <1300000>;
400 regulator-always-on;
401 regulator-boot-on;
402 op_mode = <3>;
403 };
404
405 buck2_reg: BUCK2 {
406 regulator-name = "vdd_arm";
407 regulator-min-microvolt = <850000>;
408 regulator-max-microvolt = <1350000>;
409 regulator-always-on;
410 regulator-boot-on;
411 op_mode = <3>;
412 };
413
414 buck3_reg: BUCK3 {
415 regulator-name = "vdd_int";
416 regulator-min-microvolt = <900000>;
417 regulator-max-microvolt = <1200000>;
418 regulator-always-on;
419 regulator-boot-on;
420 op_mode = <3>;
421 };
422
423 buck4_reg: BUCK4 {
424 regulator-name = "vdd_g3d";
425 regulator-min-microvolt = <850000>;
426 regulator-max-microvolt = <1300000>;
427 regulator-boot-on;
428 op_mode = <3>;
429 };
430
431 buck5_reg: BUCK5 {
432 regulator-name = "P1.8V_BUCK_OUT5";
433 regulator-min-microvolt = <1800000>;
434 regulator-max-microvolt = <1800000>;
435 regulator-always-on;
436 regulator-boot-on;
437 op_mode = <1>;
438 };
439
440 buck6_reg: BUCK6 {
441 regulator-name = "P1.2V_BUCK_OUT6";
442 regulator-min-microvolt = <2050000>;
443 regulator-max-microvolt = <2050000>;
444 regulator-always-on;
445 regulator-boot-on;
446 op_mode = <0>;
447 };
448
449 buck9_reg: BUCK9 {
450 regulator-name = "vdd_ummc";
451 regulator-min-microvolt = <950000>;
452 regulator-max-microvolt = <3000000>;
453 regulator-always-on;
454 regulator-boot-on;
455 op_mode = <3>;
456 };
457 };
458 };
459};
460
Simon Glass67063672016-02-21 21:08:58 -0700461&dp {
462 status = "okay";
463 samsung,color-space = <0>;
464 samsung,dynamic-range = <0>;
465 samsung,ycbcr-coeff = <0>;
466 samsung,color-depth = <1>;
467 samsung,link-rate = <0x0a>;
468 samsung,lane-count = <1>;
469 samsung,hpd-gpio = <&gpc3 0 GPIO_ACTIVE_HIGH>;
470
471 ports {
472 port@0 {
473 dp_out: endpoint {
474 remote-endpoint = <&bridge_in>;
475 };
476 };
477 };
478};
479
Simon Glassb1398362015-08-03 08:19:37 -0600480&i2c_1 {
481 status = "okay";
482 samsung,i2c-sda-delay = <100>;
483 samsung,i2c-max-bus-freq = <378000>;
484};
485
486&i2c_2 {
487 status = "okay";
488 samsung,i2c-sda-delay = <100>;
489 samsung,i2c-max-bus-freq = <66000>;
490};
491
492&i2c_3 {
493 status = "okay";
494 samsung,i2c-sda-delay = <100>;
495 samsung,i2c-max-bus-freq = <66000>;
496};
497
498&i2c_4 {
499 status = "okay";
500 samsung,i2c-sda-delay = <100>;
501 samsung,i2c-max-bus-freq = <66000>;
502 clock-frequency = <66000>;
503
504 cros_ec: embedded-controller {
505 compatible = "google,cros-ec-i2c";
506 reg = <0x1e>;
507 interrupts = <6 IRQ_TYPE_NONE>;
508 interrupt-parent = <&gpx1>;
509 wakeup-source;
510 u-boot,i2c-offset-len = <0>;
511 ec-interrupt = <&gpx1 6 GPIO_ACTIVE_LOW>;
512 cros_ec_ldo_tunnel: cros-ec-ldo-tunnel {
513 compatible = "google,cros-ec-ldo-tunnel";
514 #address-cells = <1>;
515 #size-cells = <0>;
516 power-regulator {
517 compatible = "ti,tps65090";
518 reg = <0x48>;
519
520 regulators {
521 dcdc1 {
522 ti,enable-ext-control;
523 };
524 dcdc2 {
525 ti,enable-ext-control;
526 };
527 dcdc3 {
528 ti,enable-ext-control;
529 };
530 fet1: fet1 {
531 regulator-name = "vcd_led";
532 ti,overcurrent-wait = <3>;
533 };
534 tps65090_fet2: fet2 {
535 regulator-name = "video_mid";
536 regulator-always-on;
537 ti,overcurrent-wait = <3>;
538 };
539 fet3 {
540 regulator-name = "wwan_r";
541 regulator-always-on;
542 ti,overcurrent-wait = <3>;
543 };
544 fet4 {
545 regulator-name = "sdcard";
546 ti,overcurrent-wait = <3>;
547 };
548 fet5 {
549 regulator-name = "camout";
550 regulator-always-on;
551 ti,overcurrent-wait = <3>;
552 };
553 fet6: fet6 {
554 regulator-name = "lcd_vdd";
555 ti,overcurrent-wait = <3>;
556 };
557 tps65090_fet7: fet7 {
558 regulator-name = "video_mid_1a";
559 regulator-always-on;
560 ti,overcurrent-wait = <3>;
561 };
562 ldo1 {
563 };
564 ldo2 {
565 };
566 };
567 };
568 };
569 };
570};
571
572&i2c_5 {
573 status = "okay";
574 samsung,i2c-sda-delay = <100>;
575 samsung,i2c-max-bus-freq = <66000>;
576};
577
578&i2c_7 {
579 status = "okay";
580 samsung,i2c-sda-delay = <100>;
581 samsung,i2c-max-bus-freq = <66000>;
582
583 ps8622-bridge@8 {
584 compatible = "parade,ps8622";
585 reg = <0x8>;
586 sleep-gpios = <&gpc3 6 GPIO_ACTIVE_LOW>;
587 reset-gpios = <&gpc3 1 GPIO_ACTIVE_LOW>;
588 hotplug-gpios = <&gpc3 0 GPIO_ACTIVE_HIGH>;
589 power-supply = <&ldo6_reg>;
590 parade,regs = /bits/ 8 <
591 0x02 0xa1 0x01 /* HPD low */
592 /*
593 * SW setting: [1:0] SW output 1.2V voltage is
594 * lower to 96%
595 */
596 0x04 0x14 0x01
597 /* RCO SS setting: [5:4] = b01 0.5%, b10 1%, b11 1.5% */
598 0x04 0xe3 0x20
599 0x04 0xe2 0x80 /* [7] RCO SS enable */
600 /*
601 * RPHY Setting: [3:2] CDR tune wait cycle before
602 * measure for fine tune b00: 1us,
603 * 01: 0.5us, 10:2us, 11:4us
604 */
605 0x04 0x8a 0x0c
606 0x04 0x89 0x08 /* [3] RFD always on */
607 /*
608 * CTN lock in/out: 20000ppm/80000ppm. Lock out 2 times
609 */
610 0x04 0x71 0x2d
611 /* 2.7G CDR settings */
612 0x04 0x7d 0x07 /* NOF=40LSB for HBR CDR setting */
613 0x04 0x7b 0x00 /* [1:0] Fmin=+4bands */
614 0x04 0x7a 0xfd /* [7:5] DCO_FTRNG=+-40% */
615 /*
616 * 1.62G CDR settings:
617 * [5:2]NOF=64LSB [1:0]DCO scale is 2/5
618 */
619 0x04 0xc0 0x12
620 0x04 0xc1 0x92 /* Gitune=-37% */
621 0x04 0xc2 0x1c /* Fbstep=100% */
622 0x04 0x32 0x80 /* [7] LOS signal disable */
623 /* RPIO Setting */
624 /* [7:4] LVDS driver bias current 75% (250mV swing) */
625 0x04 0x00 0xb0
626 /* [7:6] Right-bar GPIO output strength is 8mA */
627 0x04 0x15 0x40
628 /* EQ Training State Machine Setting */
629 0x04 0x54 0x10 /* RCO calibration start */
630 /* [4:0] MAX_LANE_COUNT set to one lane */
631 0x01 0x02 0x81
632 /* [4:0] LANE_COUNT_SET set to one lane */
633 0x01 0x21 0x81
634 0x00 0x52 0x20
635 0x00 0xf1 0x03 /* HPD CP toggle enable */
636 0x00 0x62 0x41
637 /* Counter number add 1ms counter delay */
638 0x00 0xf6 0x01
639 /*
640 * [6]PWM function control by DPCD0040f[7], default
641 * is PWM block always works
642 */
643 0x00 0x77 0x06
644 0x00 0x4c 0x04
645 /*
646 * 04h Adjust VTotal tolerance to fix the 30Hz no-
647 * display issue
648 * DPCD00400='h00 Parade OUI = 'h001cf8
649 */
650 0x01 0xc0 0x00
651 0x01 0xc1 0x1c /* DPCD00401='h1c */
652 0x01 0xc2 0xf8 /* DPCD00402='hf8 */
653 /* DPCD403~408 = ASCII code D2SLV5='h4432534c5635 */
654 0x01 0xc3 0x44
655 0x01 0xc4 0x32 /* DPCD404 */
656 0x01 0xc5 0x53 /* DPCD405 */
657 0x01 0xc6 0x4c /* DPCD406 */
658 0x01 0xc7 0x56 /* DPCD407 */
659 0x01 0xc8 0x35 /* DPCD408 */
660 /* DPCD40A Initial Code major revision '01' */
661 0x01 0xca 0x01
662 /* DPCD40B Initial Code minor revision '05' */
663 0x01 0xcb 0x05
664 0x01 0xa5 0xa0 /* DPCD720, Select internal PWM */
665 /*
666 * 0xff for 100% PWM of brightness, 0h for 0% brightness
667 */
668 0x01 0xa7 0x00
669 /*
670 * Set LVDS output as 6bit-VESA mapping, single LVDS
671 * channel
672 */
673 0x01 0xcc 0x13
674 0x02 0xb1 0x20 /* Enable SSC set by register */
675 /* Set SSC enabled and +/-1% central spreading */
676 0x04 0x10 0x16
677 0x04 0x59 0x60 /* MPU Clock source: LC => RCO */
678 0x04 0x54 0x14 /* LC -> RCO */
679 0x02 0xa1 0x91>; /* HPD high */
Simon Glass67063672016-02-21 21:08:58 -0700680 ports {
681 port@0 {
682 bridge_out: endpoint {
683 remote-endpoint = <&panel_in>;
684 };
685 };
686
687 port@1 {
688 bridge_in: endpoint {
689 remote-endpoint = <&dp_out>;
690 };
691 };
692 };
Simon Glassb1398362015-08-03 08:19:37 -0600693 };
694
Simon Glassaf317482019-01-11 18:37:10 -0700695 max98088: soundcodec@10 {
Simon Glass38d0bb32018-12-10 10:37:44 -0700696 reg = <0x10>;
Simon Glassaf317482019-01-11 18:37:10 -0700697 compatible = "maxim,max98088";
Simon Glass38d0bb32018-12-10 10:37:44 -0700698 #sound-dai-cells = <1>;
Simon Glassb1398362015-08-03 08:19:37 -0600699 };
Simon Glassb1398362015-08-03 08:19:37 -0600700};
701
702#include "cros-ec-keyboard.dtsi"