| Masahiro Yamada | d3ae678 | 2014-07-30 14:08:14 +0900 | [diff] [blame] | 1 | menu "mpc86xx CPU" |
| 2 | depends on MPC86xx |
| 3 | |
| 4 | config SYS_CPU |
| Masahiro Yamada | d3ae678 | 2014-07-30 14:08:14 +0900 | [diff] [blame] | 5 | default "mpc86xx" |
| 6 | |
| 7 | choice |
| 8 | prompt "Target select" |
| Joe Hershberger | f069960 | 2015-05-12 14:46:23 -0500 | [diff] [blame] | 9 | optional |
| Masahiro Yamada | d3ae678 | 2014-07-30 14:08:14 +0900 | [diff] [blame] | 10 | |
| 11 | config TARGET_SBC8641D |
| 12 | bool "Support sbc8641d" |
| York Sun | efc30b6 | 2016-11-23 14:08:36 -0800 | [diff] [blame] | 13 | select ARCH_MPC8641 |
| Simon Glass | 7a99a87 | 2017-01-23 13:31:20 -0700 | [diff] [blame] | 14 | select BOARD_EARLY_INIT_F |
| Masahiro Yamada | d3ae678 | 2014-07-30 14:08:14 +0900 | [diff] [blame] | 15 | |
| 16 | config TARGET_MPC8610HPCD |
| 17 | bool "Support MPC8610HPCD" |
| York Sun | f48436a | 2016-11-23 14:06:21 -0800 | [diff] [blame] | 18 | select ARCH_MPC8610 |
| Simon Glass | 7a99a87 | 2017-01-23 13:31:20 -0700 | [diff] [blame] | 19 | select BOARD_EARLY_INIT_F |
| Masahiro Yamada | d3ae678 | 2014-07-30 14:08:14 +0900 | [diff] [blame] | 20 | |
| 21 | config TARGET_MPC8641HPCN |
| 22 | bool "Support MPC8641HPCN" |
| York Sun | efc30b6 | 2016-11-23 14:08:36 -0800 | [diff] [blame] | 23 | select ARCH_MPC8641 |
| Simon Glass | 0e5faf0 | 2017-06-14 21:28:21 -0600 | [diff] [blame] | 24 | imply SCSI |
| Masahiro Yamada | d3ae678 | 2014-07-30 14:08:14 +0900 | [diff] [blame] | 25 | |
| 26 | config TARGET_XPEDITE517X |
| 27 | bool "Support xpedite517x" |
| York Sun | efc30b6 | 2016-11-23 14:08:36 -0800 | [diff] [blame] | 28 | select ARCH_MPC8641 |
| Masahiro Yamada | d3ae678 | 2014-07-30 14:08:14 +0900 | [diff] [blame] | 29 | |
| 30 | endchoice |
| 31 | |
| York Sun | f48436a | 2016-11-23 14:06:21 -0800 | [diff] [blame] | 32 | config ARCH_MPC8610 |
| 33 | bool |
| York Sun | fc01f55 | 2016-12-02 10:45:23 -0800 | [diff] [blame] | 34 | select FSL_LAW |
| York Sun | d297d39 | 2016-12-28 08:43:40 -0800 | [diff] [blame] | 35 | select SYS_FSL_HAS_DDR1 |
| 36 | select SYS_FSL_HAS_DDR2 |
| York Sun | f48436a | 2016-11-23 14:06:21 -0800 | [diff] [blame] | 37 | |
| York Sun | efc30b6 | 2016-11-23 14:08:36 -0800 | [diff] [blame] | 38 | config ARCH_MPC8641 |
| 39 | bool |
| York Sun | fc01f55 | 2016-12-02 10:45:23 -0800 | [diff] [blame] | 40 | select FSL_LAW |
| York Sun | d297d39 | 2016-12-28 08:43:40 -0800 | [diff] [blame] | 41 | select SYS_FSL_HAS_DDR1 |
| 42 | select SYS_FSL_HAS_DDR2 |
| York Sun | fc01f55 | 2016-12-02 10:45:23 -0800 | [diff] [blame] | 43 | |
| 44 | config FSL_LAW |
| 45 | bool |
| 46 | help |
| 47 | Use Freescale common code for Local Access Window |
| York Sun | efc30b6 | 2016-11-23 14:08:36 -0800 | [diff] [blame] | 48 | |
| York Sun | 9c62e7b | 2016-12-01 13:32:46 -0800 | [diff] [blame] | 49 | config SYS_CCSRBAR_DEFAULT |
| 50 | hex "Default CCSRBAR address" |
| 51 | default 0xff700000 if ARCH_MPC8610 || ARCH_MPC8641 |
| 52 | help |
| 53 | Default value of CCSRBAR comes from power-on-reset. It |
| 54 | is fixed on each SoC. Some SoCs can have different value |
| 55 | if changed by pre-boot regime. The value here must match |
| 56 | the current value in SoC. If not sure, do not change. |
| York Sun | 3283933 | 2016-12-01 14:10:47 -0800 | [diff] [blame] | 57 | config SYS_FSL_NUM_LAWS |
| 58 | int "Number of local access windows" |
| 59 | default 10 if ARCH_MPC8610 || ARCH_MPC8641 |
| 60 | help |
| 61 | Number of local access windows. This is fixed per SoC. |
| 62 | If not sure, do not change. |
| York Sun | 9c62e7b | 2016-12-01 13:32:46 -0800 | [diff] [blame] | 63 | |
| Masahiro Yamada | d3ae678 | 2014-07-30 14:08:14 +0900 | [diff] [blame] | 64 | source "board/freescale/mpc8610hpcd/Kconfig" |
| 65 | source "board/freescale/mpc8641hpcn/Kconfig" |
| 66 | source "board/sbc8641d/Kconfig" |
| 67 | source "board/xes/xpedite517x/Kconfig" |
| 68 | |
| 69 | endmenu |