| Philipp Tomsich | d21a4d8 | 2017-06-23 00:12:05 +0200 | [diff] [blame] | 1 | #ifndef DT_BINDINGS_RK3368_DMC_H |
| 2 | #define DT_BINDINGS_RK3368_DMC_H |
| 3 | |
| 4 | #define DMC_MSCH_CBDR 0x0 |
| 5 | #define DMC_MSCH_CBRD 0x1 |
| 6 | #define DMC_MSCH_CRBD 0x2 |
| 7 | |
| 8 | #define DDR3_800D 0 |
| 9 | #define DDR3_800E 1 |
| 10 | #define DDR3_1066E 2 |
| 11 | #define DDR3_1066F 3 |
| 12 | #define DDR3_1066G 4 |
| 13 | #define DDR3_1333F 5 |
| 14 | #define DDR3_1333G 6 |
| 15 | #define DDR3_1333H 7 |
| 16 | #define DDR3_1333J 8 |
| 17 | #define DDR3_1600G 9 |
| 18 | #define DDR3_1600H 10 |
| 19 | #define DDR3_1600J 11 |
| 20 | #define DDR3_1600K 12 |
| 21 | #define DDR3_1866J 13 |
| 22 | #define DDR3_1866K 14 |
| 23 | #define DDR3_1866L 15 |
| 24 | #define DDR3_1866M 16 |
| 25 | #define DDR3_2133K 17 |
| 26 | #define DDR3_2133L 18 |
| 27 | #define DDR3_2133M 19 |
| 28 | #define DDR3_2133N 20 |
| 29 | |
| 30 | #endif |