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git01.mediatek.com / filogic / uboot / ae1a84853039735f2bc374b8d3393709c71e1396 / . / arch / arm / dts / ast2600-evb.dts
blob: a9bba9681604f22d39d4fe204f8829afaf20cd67 [file] [log] [blame]
Chia-Wei, Wangb9f6e7b2020-12-14 13:54:27 +0800[diff] [blame]1// SPDX-License-Identifier: GPL-2.0+
2
3/dts-v1/;
4
5#include "ast2600-u-boot.dtsi"
6
7/ {
8 memory {
9 device_type = "memory";
10 reg = <0x80000000 0x40000000>;
11 };
12
13 chosen {
14 stdout-path = &uart5;
15 };
16
17 aliases {
Joel Stanleya0c21182022-06-23 18:35:28 +0930[diff] [blame]18 mmc0 = &emmc;
19 mmc1 = &sdhci0;
20 mmc2 = &sdhci1;
Chia-Wei, Wangb9f6e7b2020-12-14 13:54:27 +0800[diff] [blame]21 spi0 = &fmc;
22 spi1 = &spi1;
23 spi2 = &spi2;
24 ethernet0 = &mac0;
25 ethernet1 = &mac1;
26 ethernet2 = &mac2;
27 ethernet3 = &mac3;
28 };
29
30 cpus {
31 cpu@0 {
32 clock-frequency = <800000000>;
33 };
34 cpu@1 {
35 clock-frequency = <800000000>;
36 };
37 };
38};
39
Billy Tsai2193dc62022-03-08 11:04:07 +0800[diff] [blame]40&pwm {
41 status = "okay";
42 pinctrl-names = "default";
43 pinctrl-0 = <&pinctrl_pwm0_default
44 &pinctrl_pwm1_default
45 &pinctrl_pwm2_default
46 &pinctrl_pwm3_default
47 &pinctrl_pwm4_default
48 &pinctrl_pwm5_default
49 &pinctrl_pwm6_default
50 &pinctrl_pwm7_default
51 &pinctrl_pwm8g1_default
52 &pinctrl_pwm9g1_default
53 &pinctrl_pwm10g1_default
54 &pinctrl_pwm11g1_default
55 &pinctrl_pwm12g1_default
56 &pinctrl_pwm13g1_default
57 &pinctrl_pwm14g1_default>;
58};
59
Chia-Wei, Wangb9f6e7b2020-12-14 13:54:27 +0800[diff] [blame]60&uart5 {
61 u-boot,dm-pre-reloc;
62 status = "okay";
63};
64
65&sdrammc {
66 clock-frequency = <400000000>;
67};
68
69&wdt1 {
70 status = "okay";
71};
72
73&fmc {
74 status = "okay";
75
76 pinctrl-names = "default";
77 pinctrl-0 = <&pinctrl_fmcquad_default>;
78
79 flash@0 {
80 compatible = "spi-flash", "sst,w25q256";
81 status = "okay";
82 spi-max-frequency = <50000000>;
83 spi-tx-bus-width = <4>;
84 spi-rx-bus-width = <4>;
85 };
86
87 flash@1 {
88 compatible = "spi-flash", "sst,w25q256";
89 status = "okay";
90 spi-max-frequency = <50000000>;
91 spi-tx-bus-width = <4>;
92 spi-rx-bus-width = <4>;
93 };
94
95 flash@2 {
96 compatible = "spi-flash", "sst,w25q256";
97 status = "okay";
98 spi-max-frequency = <50000000>;
99 spi-tx-bus-width = <4>;
100 spi-rx-bus-width = <4>;
101 };
102};
103
104&spi1 {
105 status = "okay";
106
107 pinctrl-names = "default";
108 pinctrl-0 = <&pinctrl_spi1_default &pinctrl_spi1abr_default
109 &pinctrl_spi1cs1_default &pinctrl_spi1wp_default
110 &pinctrl_spi1wp_default &pinctrl_spi1quad_default>;
111
112 flash@0 {
113 compatible = "spi-flash", "sst,w25q256";
114 status = "okay";
115 spi-max-frequency = <50000000>;
116 spi-tx-bus-width = <4>;
117 spi-rx-bus-width = <4>;
118 };
119};
120
121&spi2 {
122 status = "okay";
123
124 pinctrl-names = "default";
125 pinctrl-0 = <&pinctrl_spi2_default &pinctrl_spi2cs1_default
126 &pinctrl_spi2cs2_default &pinctrl_spi2quad_default>;
127
128 flash@0 {
129 compatible = "spi-flash", "sst,w25q256";
130 status = "okay";
131 spi-max-frequency = <50000000>;
132 spi-tx-bus-width = <4>;
133 spi-rx-bus-width = <4>;
134 };
135};
136
Joel Stanleya0c21182022-06-23 18:35:28 +0930[diff] [blame]137
138&emmc_controller {
139 status = "okay";
Chia-Wei, Wangb9f6e7b2020-12-14 13:54:27 +0800[diff] [blame]140};
141
Joel Stanleya0c21182022-06-23 18:35:28 +0930[diff] [blame]142&emmc {
143 non-removable;
144 bus-width = <4>;
145 max-frequency = <100000000>;
146 clk-phase-mmc-hs200 = <9>, <225>;
Chia-Wei, Wangb9f6e7b2020-12-14 13:54:27 +0800[diff] [blame]147};
148
149&i2c4 {
150 status = "okay";
Chia-Wei, Wangb9f6e7b2020-12-14 13:54:27 +0800[diff] [blame]151};
152
153&i2c5 {
154 status = "okay";
Chia-Wei, Wangb9f6e7b2020-12-14 13:54:27 +0800[diff] [blame]155};
156
157&i2c6 {
158 status = "okay";
Chia-Wei, Wangb9f6e7b2020-12-14 13:54:27 +0800[diff] [blame]159};
160
161&i2c7 {
162 status = "okay";
Joel Stanleyadb8d852022-06-23 14:40:36 +0930[diff] [blame]163
164 temp@2e {
165 compatible = "adi,adt7490";
166 reg = <0x2e>;
167 };
168
169 eeprom@50 {
170 compatible = "atmel,24c08";
171 reg = <0x50>;
172 pagesize = <16>;
173 };
Chia-Wei, Wangb9f6e7b2020-12-14 13:54:27 +0800[diff] [blame]174};
175
176&i2c8 {
177 status = "okay";
Joel Stanleyadb8d852022-06-23 14:40:36 +0930[diff] [blame]178
179 lm75@4d {
180 compatible = "national,lm75";
181 reg = <0x4d>;
182 };
Chia-Wei, Wangb9f6e7b2020-12-14 13:54:27 +0800[diff] [blame]183};
184
Dylan Hung82f25842021-12-09 10:12:26 +0800[diff] [blame]185&mdio0 {
186 status = "okay";
187 #address-cells = <1>;
188 #size-cells = <0>;
189 ethphy0: ethernet-phy@0 {
190 reg = <0>;
191 };
192};
193
194&mdio1 {
195 status = "okay";
196 #address-cells = <1>;
197 #size-cells = <0>;
198 ethphy1: ethernet-phy@0 {
199 reg = <0>;
200 };
201};
202
203&mdio2 {
204 status = "okay";
205 #address-cells = <1>;
206 #size-cells = <0>;
207 ethphy2: ethernet-phy@0 {
208 reg = <0>;
209 };
210};
211
212&mdio3 {
213 status = "okay";
214 #address-cells = <1>;
215 #size-cells = <0>;
216 ethphy3: ethernet-phy@0 {
217 reg = <0>;
218 };
219};
220
221&mac0 {
222 status = "okay";
223 phy-mode = "rgmii-rxid";
224 phy-handle = <&ethphy0>;
225 pinctrl-names = "default";
226 pinctrl-0 = <&pinctrl_rgmii1_default>;
227};
228
229&mac1 {
230 status = "okay";
231 phy-mode = "rgmii-rxid";
232 phy-handle = <&ethphy1>;
233 pinctrl-names = "default";
234 pinctrl-0 = <&pinctrl_rgmii2_default>;
235};
236
237&mac2 {
238 status = "okay";
239 phy-mode = "rgmii";
240 phy-handle = <&ethphy2>;
241 pinctrl-names = "default";
242 pinctrl-0 = <&pinctrl_rgmii3_default>;
243};
244
245&mac3 {
246 status = "okay";
247 phy-mode = "rgmii";
248 phy-handle = <&ethphy3>;
249 pinctrl-names = "default";
250 pinctrl-0 = <&pinctrl_rgmii4_default>;
251};
252
Chia-Wei, Wangb9f6e7b2020-12-14 13:54:27 +0800[diff] [blame]253&scu {
254 mac0-clk-delay = <0x1d 0x1c
255 0x10 0x17
256 0x10 0x17>;
257 mac1-clk-delay = <0x1d 0x10
258 0x10 0x10
259 0x10 0x10>;
260 mac2-clk-delay = <0x0a 0x04
261 0x08 0x04
262 0x08 0x04>;
263 mac3-clk-delay = <0x0a 0x04
264 0x08 0x04
265 0x08 0x04>;
266};
Joel Stanleyd18ef4f2021-10-27 14:17:28 +0800[diff] [blame]267
268&hace {
269 u-boot,dm-pre-reloc;
270 status = "okay";
271};
Chia-Wei Wang3435a3f2021-10-27 14:17:31 +0800[diff] [blame]272
273&acry {
274 u-boot,dm-pre-reloc;
275 status = "okay";
276};