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git01.mediatek.com / filogic / uboot / adda11160346c765b10c71c9d71e465a4185ff50 / . / arch / arm / dts / rk3308-u-boot.dtsi
blob: b7964e2756f3c6c733383e23f829ba2503137007 [file] [log] [blame]
Andy Yan02133dd2019-11-14 11:21:14 +0800[diff] [blame]1// SPDX-License-Identifier: GPL-2.0+
2/*
3 *(C) Copyright 2019 Rockchip Electronics Co., Ltd
4 */
5
Quentin Schulzd9ffa5e2022-09-02 15:10:52 +0200[diff] [blame]6#include "rockchip-u-boot.dtsi"
7
Kever Yangd4d2b222020-01-08 17:38:48 +0800[diff] [blame]8/ {
9 aliases {
10 mmc0 = &emmc;
11 mmc1 = &sdmmc;
12 };
Jonas Karlman1cf34dd2024-04-08 18:14:01 +0000[diff] [blame]13
Jonas Karlmana499c982024-04-08 18:14:03 +0000[diff] [blame]14 chosen {
15 u-boot,spl-boot-order = "same-as-spl", &sdmmc, &emmc;
16 };
17
Jonas Karlmanc8c20092024-04-08 18:14:07 +0000[diff] [blame]18 dmc: dmc@ff010000 {
19 compatible = "rockchip,rk3308-dmc";
20 reg = <0x0 0xff010000 0x0 0x10000>;
21 bootph-all;
22 };
23
Jonas Karlmanfbced692024-04-08 18:14:02 +0000[diff] [blame]24 rng: rng@ff2f0000 {
25 compatible = "rockchip,cryptov2-rng";
26 reg = <0x0 0xff2f0000 0x0 0x4000>;
27 };
Kever Yangd4d2b222020-01-08 17:38:48 +0800[diff] [blame]28};
29
Andy Yan02133dd2019-11-14 11:21:14 +0800[diff] [blame]30&cru {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]31 bootph-all;
Andy Yan02133dd2019-11-14 11:21:14 +0800[diff] [blame]32};
33
Andy Yan02133dd2019-11-14 11:21:14 +0800[diff] [blame]34&emmc {
Jonas Karlmana499c982024-04-08 18:14:03 +0000[diff] [blame]35 bootph-pre-ram;
36 bootph-some-ram;
37
Andy Yan134eb022019-11-26 21:15:38 +0800[diff] [blame]38 /* mmc to sram can't do dma, prevent aborts transferring TF-A parts */
39 u-boot,spl-fifo-mode;
Jonas Karlmana499c982024-04-08 18:14:03 +0000[diff] [blame]40};
41
42&emmc_bus8 {
43 bootph-pre-ram;
44 bootph-some-ram;
45};
46
47&emmc_clk {
48 bootph-pre-ram;
49 bootph-some-ram;
50};
51
52&emmc_cmd {
53 bootph-pre-ram;
54 bootph-some-ram;
55};
56
57&grf {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]58 bootph-all;
Andy Yan02133dd2019-11-14 11:21:14 +0800[diff] [blame]59};
60
Jonas Karlmana499c982024-04-08 18:14:03 +0000[diff] [blame]61&pcfg_pull_none {
Pegorer Massimof8cc29b2023-07-15 10:19:40 +0000[diff] [blame]62 bootph-all;
Pegorer Massimof8cc29b2023-07-15 10:19:40 +0000[diff] [blame]63};
64
Jonas Karlmana499c982024-04-08 18:14:03 +0000[diff] [blame]65&pcfg_pull_none_4ma {
66 bootph-pre-ram;
67 bootph-some-ram;
68};
69
70&pcfg_pull_none_8ma {
71 bootph-pre-ram;
72 bootph-some-ram;
73};
74
75&pcfg_pull_up {
76 bootph-all;
77};
78
79&pcfg_pull_up_4ma {
80 bootph-pre-ram;
81 bootph-some-ram;
82};
83
84&pcfg_pull_up_8ma {
85 bootph-pre-ram;
86 bootph-some-ram;
87};
88
89&pinctrl {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]90 bootph-all;
Andy Yan02133dd2019-11-14 11:21:14 +0800[diff] [blame]91};
92
Jonas Karlmana499c982024-04-08 18:14:03 +0000[diff] [blame]93&rtc_32k {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]94 bootph-all;
Jonas Karlmana499c982024-04-08 18:14:03 +0000[diff] [blame]95};
96
97&sdmmc {
98 bootph-pre-ram;
99 bootph-some-ram;
100
101 /* mmc to sram can't do dma, prevent aborts transferring TF-A parts */
102 u-boot,spl-fifo-mode;
103};
104
105&sdmmc_bus4 {
106 bootph-pre-ram;
107 bootph-some-ram;
108};
109
110&sdmmc_clk {
111 bootph-pre-ram;
112 bootph-some-ram;
113};
114
115&sdmmc_cmd {
116 bootph-pre-ram;
117 bootph-some-ram;
118};
119
120&sdmmc_det {
121 bootph-pre-ram;
122 bootph-some-ram;
Andy Yan02133dd2019-11-14 11:21:14 +0800[diff] [blame]123};
Jonas Karlmanc8c20092024-04-08 18:14:07 +0000[diff] [blame]124
125&xin24m {
126 bootph-all;
127};