blob: 9d4340f5914189f1d347dc9a731019887e57e3ab [file] [log] [blame]
Hannes Schmelzer5639eeb2018-07-06 15:41:28 +02001// SPDX-License-Identifier: GPL-2.0+
2/*
3 * Copyright (C) 2018 B&R Industrial Automation GmbH
4 * http://www.br-automation.com
5 *
6 */
7/dts-v1/;
8
9#include "am33xx.dtsi"
10
11/ {
12 model = "BRPPT1 (NAND) Panel";
13 compatible = "ti,am33xx";
14
15 fset: factory-settings {
16 bl-version = "ABCDEFGHIJKLMNOPQRSTUVWXYZ0123456890";
17 version = <0x0100>;
18 order-no = "6PPT30 (NAND)";
19 hw-revision = "ABCDEFGHIJKLMNOPQRSTUVWXYZ0123456890";
20 serial-no = "0";
21 device-id = <0x0>;
22 parent-id = <0x0>;
23 hw-variant = <0x1>;
24 };
25
26 aliases {
27 ds1bkl0 = &pwmbacklight;
28 ds1bkl1 = &tps_bl;
29 ds1timing = &timing0;
30 ds1ctrl = &lcdc;
31 gpmc = &gpmc;
32 mmc = &mmc2;
33 fset = &fset;
34 };
35
36 chosen {
37 bootargs = "console=ttyO0,115200 earlyprintk";
38 stdout-path = &uart0;
39 };
40
41 memory {
42 device_type = "memory";
43 reg = <0x80000000 0x10000000>; /* 256 MB */
44 };
45
46 panel {
47 status = "disabled";
48
49 compatible = "ti,tilcdc,panel";
50 enable-gpios = <&gpio0 6 GPIO_ACTIVE_LOW>;
51
52 backlight = <&pwmbacklight>;
53 bkl-pwm = <&pwmbacklight>;
54 bkl-tps = <&tps_bl>;
55
Dario Binacchi9b8c3202020-02-22 14:05:46 +010056 u-boot,dm-pre-reloc;
57
Hannes Schmelzer5639eeb2018-07-06 15:41:28 +020058 panel-info {
59 ac-bias = <255>;
60 ac-bias-intrpt = <0>;
61 dma-burst-sz = <16>;
62 bpp = <32>;
63 fdd = <0x80>;
64 sync-edge = <0>;
65 sync-ctrl = <1>;
66 raster-order = <0>;
67 fifo-th = <0>;
68 };
69
70 display-timings {
71 native-mode = <&timing0>;
72 timing0: lcd {
73 clock-frequency = <32000000>;
74 hactive = <800>;
75 vactive = <480>;
76 hfront-porch = <2>;
77 hback-porch = <192>;
78 hsync-len = <1>;
79 vfront-porch = <20>;
80 vback-porch = <2>;
81 vsync-len = <1>;
82 hsync-active = <1>;
83 vsync-active = <1>;
84 pupdelay = <10>;
85 pondelay = <10>;
86 };
87 };
88 };
89
90 vmmcsd_fixed: fixedregulator@0 {
91 compatible = "regulator-fixed";
92 regulator-name = "vmmcsd_fixed";
93 regulator-min-microvolt = <3300000>;
94 regulator-max-microvolt = <3300000>;
95 };
96
97 pwm0: omap-pwm@timer5 {
98 compatible = "ti,omap-dmtimer-pwm";
99 ti,timers = <&timer5>;
100 #pwm-cells = <3>;
101 };
102
103 pwm1: omap-pwm@timer6 {
104 compatible = "ti,omap-dmtimer-pwm";
105 ti,timers = <&timer6>;
106 #pwm-cells = <3>;
107 };
108
109 beeper: pwm-beep {
110 compatible = "pwm-beeper";
111 pwms = <&pwm0 0 0 0>;
112 };
113
114 pwmbacklight: pwm-bkl {
115 compatible = "pwm-backlight";
116 pwms = <&pwm1 0 5000000 0>;
117
118 default-brightness-level = <255>;
119 brightness-levels = <0 16 32 64 128 170 202 234 255>;
120
121 power-supply = <&vmmcsd_fixed>;
122 enable-gpios = <&gpio0 7 GPIO_ACTIVE_HIGH>;
123 };
124};
125
126&uart0 { /* console uart */
127 u-boot,dm-spl;
128 status = "okay";
129};
130
131&uart1 {
132 status = "okay";
133};
134
135&i2c0 {
136 u-boot,dm-spl;
137 status = "okay";
138 clock-frequency = <400000>;
139
140 tps: tps@24 { /* PMIC controller */
141 u-boot,dm-spl;
142 reg = <0x24>;
143 compatible = "ti,tps65217";
144
145 tps_bl: backlight {
146 compatible = "ti,tps65217-bl";
147 isel = <1>; /* 1 - ISET1, 2 ISET2 */
148 fdim = <1000>; /* TPS65217_BL_FDIM_1kHZ */
149 default-brightness = <50>;
150 };
151 };
152};
153
154&i2c2 {
155 status = "okay";
156 clock-frequency = <100000>;
157};
158
159&edma {
160 status = "okay";
161};
162
163&cppi41dma {
164 status = "okay";
165};
166
167&usb {
168 status = "okay";
169};
170
171&usb_ctrl_mod {
172 status = "okay";
173};
174
175&usb0_phy {
176 status = "okay";
177};
178
179&usb1_phy {
180 status = "okay";
181};
182
183&usb0 {
184 status = "okay";
185 dr_mode = "host";
186};
187
188&usb1 {
189 status = "okay";
190 dr_mode = "host";
191};
192
193&davinci_mdio {
194 status = "okay";
195
196 phy0: ethernet-phy@0 {
197 reg = <1>;
198 };
199
200 phy1: ethernet-phy@1 {
201 reg = <2>;
202 };
203};
204
205&mac {
206 dual_emac;
207 status = "okay";
208};
209
210&cpsw_emac0 {
211 phy-handle = <&phy0>;
212 dual_emac_res_vlan = <1>;
213 phy-mode = "mii";
214};
215
216&cpsw_emac1 {
217 phy-handle = <&phy1>;
218 dual_emac_res_vlan = <2>;
219 phy-mode = "mii";
220};
221
222&mmc2 {
223 vmmc-supply = <&vmmcsd_fixed>;
224 bus-width = <0x4>;
225 ti,non-removable;
226 ti,needs-special-hs-handling;
227 ti,vcc-aux-disable-is-sleep;
228 status = "disabled";
229};
230
231&lcdc {
232 status = "disabled";
233};
234
235&elm {
236 status = "okay";
237};
238
239&sham {
240 status = "okay";
241};
242
243&aes {
244 status = "okay";
245};
246
247&gpio0 {
248 u-boot,dm-spl;
249 ti,no-reset-on-init;
250};
251
252&gpio1 {
253 u-boot,dm-spl;
254 ti,no-reset-on-init;
255};
256
257&gpio2 {
258 u-boot,dm-spl;
259 ti,no-reset-on-init;
260};
261
262&gpio3 {
263 u-boot,dm-spl;
264 ti,no-reset-on-init;
265};
266
267&wdt2 {
268 ti,no-reset-on-init;
269 ti,no-idle-on-init;
270};
271
272&tscadc {
273 status = "okay";
274 tsc {
275 ti,wires = <4>;
276 ti,x-plate-resistance = <200>;
277 ti,zx-cutoff-ratio = <40>;
278 ti,min_deviation = <60>;
279 ti,max_deviation = <600>;
280 ti,coordinate-readouts = <5>;
281 ti,wire-config = <0x00 0x11 0x22 0x33>;
282
283 bnr-buttons {
284 Home-Button {};
285 };
286 };
287
288 adc {
289 ti,adc-channels = <5 6 7>;
290 };
291};
292
293&gpmc {
294 u-boot,dm-spl;
295 status = "okay";
296 pinctrl-names = "default";
297 ranges = <0 0 0x08000000 0x10000000>; /* CS0: NAND */
298 nand@0,0 {
299 compatible = "ti,omap2-nand";
300 reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
301 interrupt-parent = <&gpmc>;
302 rb-gpios = <&gpmc 1 GPIO_ACTIVE_HIGH>; /* gpmc_wait1 */
303 ti,nand-ecc-opt = "bch8";
304 ti,elm-id = <&elm>;
305 nand-bus-width = <8>;
306 gpmc,device-width = <1>;
307 gpmc,sync-clk-ps = <0>;
308 gpmc,cs-on-ns = <0>;
309 gpmc,cs-rd-off-ns = <44>;
310 gpmc,cs-wr-off-ns = <44>;
311 gpmc,adv-on-ns = <6>;
312 gpmc,adv-rd-off-ns = <34>;
313 gpmc,adv-wr-off-ns = <44>;
314 gpmc,we-on-ns = <0>;
315 gpmc,we-off-ns = <40>;
316 gpmc,oe-on-ns = <0>;
317 gpmc,oe-off-ns = <54>;
318 gpmc,access-ns = <64>;
319 gpmc,rd-cycle-ns = <82>;
320 gpmc,wr-cycle-ns = <82>;
321 gpmc,wait-on-read = "true";
322 gpmc,wait-on-write = "true";
323 gpmc,bus-turnaround-ns = <0>;
324 gpmc,cycle2cycle-delay-ns = <0>;
325 gpmc,clk-activation-ns = <0>;
326 gpmc,wait-monitoring-ns = <0>;
327 gpmc,wr-access-ns = <40>;
328 gpmc,wr-data-mux-bus-ns = <0>;
329 gpmc,wait-pin = <1>;
330 #address-cells = <1>;
331 #size-cells = <1>;
332 partition@0 {
333 label = "NAND.MLO";
334 reg = <0x00000000 0x000020000>;
335 };
336 partition@1 {
337 label = "NAND.cfgscr";
338 reg = <0x00020000 0x00020000>;
339 };
340 partition@2 {
341 label = "NAND.dtb";
342 reg = <0x00040000 0x00020000>;
343 };
344 partition@3 {
345 label = "NAND.u-boot-env";
346 reg = <0x00060000 0x00020000>;
347 };
348 partition@4 {
349 label = "NAND.u-boot";
350 reg = <0x00080000 0x00080000>;
351 };
352 partition@5 {
353 label = "NAND.kernel";
354 reg = <0x00100000 0x00400000>;
355 };
356 partition@6 {
357 label = "NAND.rootfs";
358 reg = <0x00500000 0x08000000>;
359 };
360 partition@7 {
361 label = "NAND.user";
362 reg = <0x08500000 0x17b00000>;
363 };
364 };
365};