blob: 99dd7d3924cd148a3bc4dd7c2801e260047375cb [file] [log] [blame]
Angelo Dureghelloc6164c92019-03-13 21:46:41 +01001// SPDX-License-Identifier: GPL-2.0+
2/*
Angelo Durgehelloc6e17f92019-11-15 23:54:12 +01003 * Copyright (C) 2019 Angelo Dureghello <angelo@sysam.it>
Angelo Dureghelloc6164c92019-03-13 21:46:41 +01004 */
5
6/ {
7 compatible = "fsl,mcf5275";
8
9 aliases {
10 serial0 = &uart0;
Angelo Durgehelloc6e17f92019-11-15 23:54:12 +010011 fec0 = &fec0;
12 fec1 = &fec1;
Angelo Dureghelloc6164c92019-03-13 21:46:41 +010013 };
14
15 soc {
16 compatible = "simple-bus";
17 #address-cells = <1>;
18 #size-cells = <1>;
19
20 ipsbar: ipsbar@4000000 {
21 compatible = "simple-bus";
22 #address-cells = <1>;
23 #size-cells = <1>;
24 ranges = <0x00000000 0x40000000 0x40000000>;
25 reg = <0x40000000 0x40000000>;
26
27 uart0: uart@200 {
28 compatible = "fsl,mcf-uart";
29 reg = <0x200 0x40>;
30 status = "disabled";
31 };
32
33 uart1: uart@240 {
34 compatible = "fsl,mcf-uart";
35 reg = <0x240 0x40>;
36 status = "disabled";
37 };
38
39 uart2: uart@280 {
40 compatible = "fsl,mcf-uart";
41 reg = <0x280 0x40>;
42 status = "disabled";
43 };
Angelo Durgehelloc6e17f92019-11-15 23:54:12 +010044
45 fec0: ethernet@1000 {
46 compatible = "fsl,mcf-fec";
47 reg = <0x1000 0x800>;
48 max-speed = <100>;
49 phy-addr = <(-1)>;
50 timeout-loop = <50000>;
51 status = "disabled";
52 };
53
54 fec1: ethernet@1800 {
55 compatible = "fsl,mcf-fec";
56 reg = <0x1800 0x800>;
57 mii-base = <0>;
58 max-speed = <100>;
59 timeout-loop = <50000>;
60 status = "disabled";
61 };
Angelo Dureghelloc6164c92019-03-13 21:46:41 +010062 };
63 };
64};