Suniel Mahesh | f1cd07b | 2020-02-03 19:20:04 +0530 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0+ |
| 2 | /* |
| 3 | * (C) Copyright 2016 Rockchip Electronics Co., Ltd |
| 4 | */ |
| 5 | |
| 6 | #include <common.h> |
| 7 | #include <dm.h> |
| 8 | #include <asm/arch-rockchip/periph.h> |
| 9 | #include <power/regulator.h> |
Suniel Mahesh | fe65e71 | 2020-02-03 19:20:05 +0530 | [diff] [blame] | 10 | #include <spl_gpio.h> |
| 11 | #include <asm/io.h> |
| 12 | #include <asm/arch-rockchip/gpio.h> |
| 13 | #include <asm/arch-rockchip/grf_rk3399.h> |
Suniel Mahesh | f1cd07b | 2020-02-03 19:20:04 +0530 | [diff] [blame] | 14 | |
| 15 | #ifndef CONFIG_SPL_BUILD |
| 16 | int board_early_init_f(void) |
| 17 | { |
| 18 | struct udevice *regulator; |
| 19 | int ret; |
| 20 | |
| 21 | ret = regulator_get_by_platname("vcc5v0_host", ®ulator); |
| 22 | if (ret) { |
| 23 | debug("%s vcc5v0_host init fail! ret %d\n", __func__, ret); |
| 24 | goto out; |
| 25 | } |
| 26 | |
| 27 | ret = regulator_set_enable(regulator, true); |
| 28 | if (ret) |
| 29 | debug("%s vcc5v0-host-en set fail! ret %d\n", __func__, ret); |
| 30 | out: |
| 31 | return 0; |
| 32 | } |
| 33 | #endif |
Suniel Mahesh | fe65e71 | 2020-02-03 19:20:05 +0530 | [diff] [blame] | 34 | |
| 35 | #if defined(CONFIG_TPL_BUILD) |
| 36 | |
| 37 | #define PMUGRF_BASE 0xff320000 |
| 38 | #define GPIO0_BASE 0xff720000 |
| 39 | |
| 40 | int board_early_init_f(void) |
| 41 | { |
| 42 | struct rockchip_gpio_regs * const gpio0 = (void *)GPIO0_BASE; |
| 43 | struct rk3399_pmugrf_regs * const pmugrf = (void *)PMUGRF_BASE; |
| 44 | |
| 45 | /** |
| 46 | * 1. Glow yellow LED, termed as low power |
| 47 | * 2. Poll for on board power key press |
| 48 | * 3. Once 2 done, off yellow and glow red LED, termed as full power |
| 49 | * 4. Continue booting... |
| 50 | */ |
| 51 | spl_gpio_output(gpio0, GPIO(BANK_A, 2), 1); |
| 52 | |
| 53 | spl_gpio_set_pull(&pmugrf->gpio0_p, GPIO(BANK_A, 5), GPIO_PULL_NORMAL); |
| 54 | while (readl(&gpio0->ext_port) & 0x20); |
| 55 | |
| 56 | spl_gpio_output(gpio0, GPIO(BANK_A, 2), 0); |
| 57 | spl_gpio_output(gpio0, GPIO(BANK_B, 5), 1); |
| 58 | |
| 59 | return 0; |
| 60 | } |
| 61 | #endif |