Dinh Nguyen | ad51f7c | 2012-10-04 06:46:02 +0000 | [diff] [blame^] | 1 | /* |
| 2 | * Copyright (C) 2012 Altera Corporation <www.altera.com> |
| 3 | * |
| 4 | * This program is free software; you can redistribute it and/or modify |
| 5 | * it under the terms of the GNU General Public License as published by |
| 6 | * the Free Software Foundation; either version 2 of the License, or |
| 7 | * (at your option) any later version. |
| 8 | * |
| 9 | * This program is distributed in the hope that it will be useful, |
| 10 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 11 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 12 | * GNU General Public License for more details. |
| 13 | * |
| 14 | * You should have received a copy of the GNU General Public License |
| 15 | * along with this program. If not, see <http://www.gnu.org/licenses/>. |
| 16 | */ |
| 17 | |
| 18 | #ifndef _RESET_MANAGER_H_ |
| 19 | #define _RESET_MANAGER_H_ |
| 20 | |
| 21 | void reset_cpu(ulong addr); |
| 22 | void reset_deassert_peripherals_handoff(void); |
| 23 | |
| 24 | struct socfpga_reset_manager { |
| 25 | u32 padding1; |
| 26 | u32 ctrl; |
| 27 | u32 padding2; |
| 28 | u32 padding3; |
| 29 | u32 mpu_mod_reset; |
| 30 | u32 per_mod_reset; |
| 31 | u32 per2_mod_reset; |
| 32 | u32 brg_mod_reset; |
| 33 | }; |
| 34 | |
| 35 | #define RSTMGR_CTRL_SWWARMRSTREQ_LSB 1 |
| 36 | |
| 37 | #endif /* _RESET_MANAGER_H_ */ |