Lokesh Vutla | 56c8f0a | 2016-04-13 09:50:59 +0530 | [diff] [blame] | 1 | # |
| 2 | # Memory devices |
| 3 | # |
| 4 | |
| 5 | menu "Memory Controller drivers" |
| 6 | |
Christophe Kerello | a994a80 | 2020-07-31 09:53:40 +0200 | [diff] [blame] | 7 | config STM32_FMC2_EBI |
| 8 | bool "Support for FMC2 External Bus Interface on STM32MP SoCs" |
| 9 | depends on ARCH_STM32MP |
| 10 | help |
| 11 | Select this option to enable the STM32 FMC2 External Bus Interface |
| 12 | controller. This driver configures the transactions with external |
| 13 | devices (like SRAM, ethernet adapters, FPGAs, LCD displays, ...) on |
| 14 | SOCs containing the FMC2 External Bus Interface. |
| 15 | |
Lokesh Vutla | 56c8f0a | 2016-04-13 09:50:59 +0530 | [diff] [blame] | 16 | config TI_AEMIF |
| 17 | tristate "Texas Instruments AEMIF driver" |
| 18 | depends on ARCH_KEYSTONE |
| 19 | help |
| 20 | This driver is for the AEMIF module available in Texas Instruments |
| 21 | SoCs. AEMIF stands for Asynchronous External Memory Interface and |
| 22 | is intended to provide a glue-less interface to a variety of |
| 23 | asynchronuous memory devices like ASRAM, NOR and NAND memory. A total |
| 24 | of 256M bytes of any of these memories can be accessed at a given |
| 25 | time via four chip selects with 64M byte access per chip select. |
| 26 | |
| 27 | endmenu |