| developer | 9400209 | 2023-07-19 17:16:33 +0800 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0 */ |
| 2 | /* |
| 3 | * Copyright (C) 2023 MediaTek Inc. |
| 4 | */ |
| 5 | |
| 6 | #ifndef _DT_BINDINGS_MTK_RESET_H_ |
| 7 | #define _DT_BINDINGS_MTK_RESET_H_ |
| 8 | |
| 9 | /* ETHDMA Subsystem resets */ |
| 10 | #define ETHDMA_FE_RST 6 |
| 11 | #define ETHDMA_PMTR_RST 8 |
| 12 | #define ETHDMA_GMAC_RST 23 |
| 13 | #define ETHDMA_WDMA0_RST 24 |
| 14 | #define ETHDMA_WDMA1_RST 25 |
| 15 | #define ETHDMA_WDMA2_RST 26 |
| 16 | #define ETHDMA_PPE0_RST 29 |
| 17 | #define ETHDMA_PPE1_RST 30 |
| 18 | #define ETHDMA_PPE2_RST 31 |
| 19 | |
| 20 | /* ETHWARP Subsystem resets */ |
| 21 | #define ETHWARP_GSW_RST 9 |
| 22 | #define ETHWARP_EIP197_RST 10 |
| 23 | #define ETHWARP_WOCPU0_RST 32 |
| 24 | #define ETHWARP_WOCPU1_RST 33 |
| 25 | #define ETHWARP_WOCPU2_RST 34 |
| 26 | #define ETHWARP_WOX_NET_MUX_RST 35 |
| 27 | #define ETHWARP_WED0_RST 36 |
| 28 | #define ETHWARP_WED1_RST 37 |
| 29 | #define ETHWARP_WED2_RST 38 |
| 30 | |
| 31 | #endif /* _DT_BINDINGS_MTK_RESET_H_ */ |