| Tom Rini | 10e4779 | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0+ */ |
| Wu, Josh | 4258754 | 2015-03-30 14:51:19 +0800 | [diff] [blame] | 2 | /* |
| 3 | * Common part of configuration settings for the AT91 SAMA5 board. |
| 4 | * |
| 5 | * Copyright (C) 2015 Atmel Corporation |
| 6 | * Josh Wu <josh.wu@atmel.com> |
| Wu, Josh | 4258754 | 2015-03-30 14:51:19 +0800 | [diff] [blame] | 7 | */ |
| 8 | |
| 9 | #ifndef __AT91_SAMA5_COMMON_H |
| 10 | #define __AT91_SAMA5_COMMON_H |
| 11 | |
| Wu, Josh | 4258754 | 2015-03-30 14:51:19 +0800 | [diff] [blame] | 12 | /* ARM asynchronous clock */ |
| Tom Rini | 6a5dccc | 2022-11-16 13:10:41 -0500 | [diff] [blame] | 13 | #define CFG_SYS_AT91_SLOW_CLOCK 32768 |
| 14 | #define CFG_SYS_AT91_MAIN_CLOCK 12000000 /* from 12 MHz crystal */ |
| Wu, Josh | 4258754 | 2015-03-30 14:51:19 +0800 | [diff] [blame] | 15 | |
| Wu, Josh | 4258754 | 2015-03-30 14:51:19 +0800 | [diff] [blame] | 16 | #endif |