blob: 51fd10b566ac2614baea447204cc9f7bc28a4585 [file] [log] [blame]
Nobuhiro Iwamatsu970dc332007-05-13 20:58:00 +09001/*
2 * linux/include/asm-sh/io.h
3 *
4 * Copyright (C) 1996-2000 Russell King
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 * Modifications:
11 * 16-Sep-1996 RMK Inlined the inx/outx functions & optimised for both
12 * constant addresses and variable addresses.
13 * 04-Dec-1997 RMK Moved a lot of this stuff to the new architecture
14 * specific IO header files.
15 * 27-Mar-1999 PJB Second parameter of memcpy_toio is const..
16 * 04-Apr-1999 PJB Added check_signature.
17 * 12-Dec-1999 RMK More cleanups
18 * 18-Jun-2000 RMK Removed virt_to_* and friends definitions
19 */
20#ifndef __ASM_SH_IO_H
21#define __ASM_SH_IO_H
22
23#ifdef __KERNEL__
24
25#include <linux/types.h>
26#include <asm/byteorder.h>
27
28/*
29 * Generic virtual read/write. Note that we don't support half-word
30 * read/writes. We define __arch_*[bl] here, and leave __arch_*w
31 * to the architecture specific code.
32 */
33#define __arch_getb(a) (*(volatile unsigned char *)(a))
34#define __arch_getw(a) (*(volatile unsigned short *)(a))
35#define __arch_getl(a) (*(volatile unsigned int *)(a))
36
37#define __arch_putb(v,a) (*(volatile unsigned char *)(a) = (v))
38#define __arch_putw(v,a) (*(volatile unsigned short *)(a) = (v))
39#define __arch_putl(v,a) (*(volatile unsigned int *)(a) = (v))
40
41extern void __raw_writesb(unsigned int addr, const void *data, int bytelen);
42extern void __raw_writesw(unsigned int addr, const void *data, int wordlen);
43extern void __raw_writesl(unsigned int addr, const void *data, int longlen);
44
45extern void __raw_readsb(unsigned int addr, void *data, int bytelen);
46extern void __raw_readsw(unsigned int addr, void *data, int wordlen);
47extern void __raw_readsl(unsigned int addr, void *data, int longlen);
48
49#define __raw_writeb(v,a) __arch_putb(v,a)
50#define __raw_writew(v,a) __arch_putw(v,a)
51#define __raw_writel(v,a) __arch_putl(v,a)
52
53#define __raw_readb(a) __arch_getb(a)
54#define __raw_readw(a) __arch_getw(a)
55#define __raw_readl(a) __arch_getl(a)
56
57/*
58 * The compiler seems to be incapable of optimising constants
59 * properly. Spell it out to the compiler in some cases.
60 * These are only valid for small values of "off" (< 1<<12)
61 */
62#define __raw_base_writeb(val,base,off) __arch_base_putb(val,base,off)
63#define __raw_base_writew(val,base,off) __arch_base_putw(val,base,off)
64#define __raw_base_writel(val,base,off) __arch_base_putl(val,base,off)
65
66#define __raw_base_readb(base,off) __arch_base_getb(base,off)
67#define __raw_base_readw(base,off) __arch_base_getw(base,off)
68#define __raw_base_readl(base,off) __arch_base_getl(base,off)
69
70/*
71 * Now, pick up the machine-defined IO definitions
72 */
73#if 0 /* XXX###XXX */
74#include <asm/arch/io.h>
75#endif /* XXX###XXX */
76
77/*
78 * IO port access primitives
79 * -------------------------
80 *
81 * The SH doesn't have special IO access instructions; all IO is memory
82 * mapped. Note that these are defined to perform little endian accesses
83 * only. Their primary purpose is to access PCI and ISA peripherals.
84 *
85 * The machine specific io.h include defines __io to translate an "IO"
86 * address to a memory address.
87 *
88 * Note that we prevent GCC re-ordering or caching values in expressions
89 * by introducing sequence points into the in*() definitions. Note that
90 * __raw_* do not guarantee this behaviour.
91 *
92 * The {in,out}[bwl] macros are for emulating x86-style PCI/ISA IO space.
93 */
Nobuhiro Iwamatsu547b67f2007-09-23 02:12:30 +090094#define outb(v,p) __raw_writeb(v, p)
95#define outw(v,p) __raw_writew(cpu_to_le16(v),p)
96#define outl(v,p) __raw_writel(cpu_to_le32(v),p)
Nobuhiro Iwamatsu970dc332007-05-13 20:58:00 +090097
Nobuhiro Iwamatsu547b67f2007-09-23 02:12:30 +090098#define inb(p) ({ unsigned int __v = __raw_readb(p); __v; })
99#define inw(p) ({ unsigned int __v = __le16_to_cpu(__raw_readw(p)); __v; })
100#define inl(p) ({ unsigned int __v = __le32_to_cpu(__raw_readl(p)); __v; })
Nobuhiro Iwamatsu970dc332007-05-13 20:58:00 +0900101
Nobuhiro Iwamatsu547b67f2007-09-23 02:12:30 +0900102#define outsb(p,d,l) __raw_writesb(p,d,l)
103#define outsw(p,d,l) __raw_writesw(p,d,l)
104#define outsl(p,d,l) __raw_writesl(p,d,l)
Nobuhiro Iwamatsu970dc332007-05-13 20:58:00 +0900105
Nobuhiro Iwamatsu547b67f2007-09-23 02:12:30 +0900106#define insb(p,d,l) __raw_readsb(p,d,l)
107#define insw(p,d,l) __raw_readsw(p,d,l)
108#define insl(p,d,l) __raw_readsl(p,d,l)
Nobuhiro Iwamatsu970dc332007-05-13 20:58:00 +0900109
110#define outb_p(val,port) outb((val),(port))
111#define outw_p(val,port) outw((val),(port))
112#define outl_p(val,port) outl((val),(port))
113#define inb_p(port) inb((port))
114#define inw_p(port) inw((port))
115#define inl_p(port) inl((port))
116
117#define outsb_p(port,from,len) outsb(port,from,len)
118#define outsw_p(port,from,len) outsw(port,from,len)
119#define outsl_p(port,from,len) outsl(port,from,len)
120#define insb_p(port,to,len) insb(port,to,len)
121#define insw_p(port,to,len) insw(port,to,len)
122#define insl_p(port,to,len) insl(port,to,len)
123
124/*
125 * ioremap and friends.
126 *
127 * ioremap takes a PCI memory address, as specified in
128 * linux/Documentation/IO-mapping.txt. If you want a
129 * physical address, use __ioremap instead.
130 */
131extern void * __ioremap(unsigned long offset, size_t size, unsigned long flags);
132extern void __iounmap(void *addr);
133
134/*
135 * Generic ioremap support.
136 *
137 * Define:
138 * iomem_valid_addr(off,size)
139 * iomem_to_phys(off)
140 */
141#ifdef iomem_valid_addr
142#define __arch_ioremap(off,sz,nocache) \
143 ({ \
144 unsigned long _off = (off), _size = (sz); \
145 void *_ret = (void *)0; \
146 if (iomem_valid_addr(_off, _size)) \
147 _ret = __ioremap(iomem_to_phys(_off),_size,0); \
148 _ret; \
149 })
150
151#define __arch_iounmap __iounmap
152#endif
153
154#define ioremap(off,sz) __arch_ioremap((off),(sz),0)
155#define ioremap_nocache(off,sz) __arch_ioremap((off),(sz),1)
156#define iounmap(_addr) __arch_iounmap(_addr)
157
158/*
159 * DMA-consistent mapping functions. These allocate/free a region of
160 * uncached, unwrite-buffered mapped memory space for use with DMA
161 * devices. This is the "generic" version. The PCI specific version
162 * is in pci.h
163 */
164extern void *consistent_alloc(int gfp, size_t size, dma_addr_t *handle);
165extern void consistent_free(void *vaddr, size_t size, dma_addr_t handle);
166extern void consistent_sync(void *vaddr, size_t size, int rw);
167
168/*
169 * String version of IO memory access ops:
170 */
171extern void _memcpy_fromio(void *, unsigned long, size_t);
172extern void _memcpy_toio(unsigned long, const void *, size_t);
173extern void _memset_io(unsigned long, int, size_t);
174
Nobuhiro Iwamatsu970dc332007-05-13 20:58:00 +0900175/*
176 * If this architecture has PCI memory IO, then define the read/write
177 * macros. These should only be used with the cookie passed from
178 * ioremap.
179 */
180#ifdef __mem_pci
181
182#define readb(c) ({ unsigned int __v = __raw_readb(__mem_pci(c)); __v; })
183#define readw(c) ({ unsigned int __v = le16_to_cpu(__raw_readw(__mem_pci(c))); __v; })
184#define readl(c) ({ unsigned int __v = le32_to_cpu(__raw_readl(__mem_pci(c))); __v; })
185
186#define writeb(v,c) __raw_writeb(v,__mem_pci(c))
187#define writew(v,c) __raw_writew(cpu_to_le16(v),__mem_pci(c))
188#define writel(v,c) __raw_writel(cpu_to_le32(v),__mem_pci(c))
189
190#define memset_io(c,v,l) _memset_io(__mem_pci(c),(v),(l))
191#define memcpy_fromio(a,c,l) _memcpy_fromio((a),__mem_pci(c),(l))
192#define memcpy_toio(c,a,l) _memcpy_toio(__mem_pci(c),(a),(l))
193
194#define eth_io_copy_and_sum(s,c,l,b) \
195 eth_copy_and_sum((s),__mem_pci(c),(l),(b))
196
197static inline int
198check_signature(unsigned long io_addr, const unsigned char *signature,
199 int length)
200{
201 int retval = 0;
202 do {
203 if (readb(io_addr) != *signature)
204 goto out;
205 io_addr++;
206 signature++;
207 length--;
208 } while (length);
209 retval = 1;
210out:
211 return retval;
212}
213
214#elif !defined(readb)
215
Nobuhiro Iwamatsu547b67f2007-09-23 02:12:30 +0900216#define readb(addr) __raw_readb(addr)
217#define readw(addr) __raw_readw(addr)
218#define readl(addr) __raw_readl(addr)
219#define writeb(v,addr) __raw_writeb(v, addr)
220#define writew(v,addr) __raw_writew(v, addr)
221#define writel(v,addr) __raw_writel(v, addr)
Nobuhiro Iwamatsu970dc332007-05-13 20:58:00 +0900222
223#define check_signature(io,sig,len) (0)
224
225#endif /* __mem_pci */
226
Nobuhiro Iwamatsu970dc332007-05-13 20:58:00 +0900227static inline void sync(void)
228{
229}
Nobuhiro Iwamatsuacb92442008-01-15 23:06:17 +0900230
231/*
232 * Given a physical address and a length, return a virtual address
233 * that can be used to access the memory range with the caching
234 * properties specified by "flags".
235 */
236typedef unsigned long phys_addr_t;
237
238#define MAP_NOCACHE (0)
239#define MAP_WRCOMBINE (0)
240#define MAP_WRBACK (0)
241#define MAP_WRTHROUGH (0)
242
243static inline void *
244map_physmem(phys_addr_t paddr, unsigned long len, unsigned long flags)
245{
246 return (void *)paddr;
247}
248
249/*
250 * Take down a mapping set up by map_physmem().
251 */
252static inline void unmap_physmem(void *vaddr, unsigned long flags)
253{
254
255}
256
Nobuhiro Iwamatsu970dc332007-05-13 20:58:00 +0900257#endif /* __KERNEL__ */
258#endif /* __ASM_SH_IO_H */