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Jean-Jacques Hiblot45305712018-11-29 10:57:39 +01001// SPDX-License-Identifier: GPL-2.0+
2/*
3 * OMAP USB2 PHY LAYER
4 *
Nishanth Menoneaa39c62023-11-01 15:56:03 -05005 * Copyright (C) 2018 Texas Instruments Incorporated - https://www.ti.com
Jean-Jacques Hiblot45305712018-11-29 10:57:39 +01006 * Written by Jean-Jacques Hiblot <jjhiblot@ti.com>
7 */
8
9#include <common.h>
Simon Glass3ba929a2020-10-30 21:38:53 -060010#include <asm/global_data.h>
Jean-Jacques Hiblot45305712018-11-29 10:57:39 +010011#include <asm/io.h>
12#include <dm.h>
13#include <errno.h>
14#include <generic-phy.h>
15#include <regmap.h>
Vignesh Raghavendra55c5ff52020-10-08 14:58:38 +053016#include <soc.h>
Jean-Jacques Hiblot45305712018-11-29 10:57:39 +010017#include <syscon.h>
Simon Glass4dcacfc2020-05-10 11:40:13 -060018#include <linux/bitops.h>
Simon Glassd66c5f72020-02-03 07:36:15 -070019#include <linux/err.h>
Jean-Jacques Hiblot45305712018-11-29 10:57:39 +010020
21#define OMAP_USB2_CALIBRATE_FALSE_DISCONNECT BIT(0)
Bin Liu5b9f3412020-06-03 14:46:22 +030022#define OMAP_USB2_DISABLE_CHG_DET BIT(1)
Jean-Jacques Hiblot45305712018-11-29 10:57:39 +010023
24#define OMAP_DEV_PHY_PD BIT(0)
25#define OMAP_USB2_PHY_PD BIT(28)
26
Jean-Jacques Hiblot106b08a2018-12-04 11:30:49 +010027#define AM437X_USB2_PHY_PD BIT(0)
28#define AM437X_USB2_OTG_PD BIT(1)
29#define AM437X_USB2_OTGVDET_EN BIT(19)
30#define AM437X_USB2_OTGSESSEND_EN BIT(20)
31
Jean-Jacques Hiblot45305712018-11-29 10:57:39 +010032#define USB2PHY_DISCON_BYP_LATCH BIT(31)
33#define USB2PHY_ANA_CONFIG1 (0x4c)
34
Vignesh Raghavendra77be8b22019-12-09 10:37:31 +053035#define AM654_USB2_OTG_PD BIT(8)
36#define AM654_USB2_VBUS_DET_EN BIT(5)
37#define AM654_USB2_VBUSVALID_DET_EN BIT(4)
38
Bin Liu5b9f3412020-06-03 14:46:22 +030039#define USB2PHY_CHRG_DET 0x14
40#define USB2PHY_USE_CHG_DET_REG BIT(29)
41#define USB2PHY_DIS_CHG_DET BIT(28)
42
Jean-Jacques Hiblot45305712018-11-29 10:57:39 +010043DECLARE_GLOBAL_DATA_PTR;
44
45struct omap_usb2_phy {
46 struct regmap *pwr_regmap;
47 ulong flags;
48 void *phy_base;
49 u32 pwr_reg_offset;
50};
51
52struct usb_phy_data {
53 const char *label;
54 u8 flags;
55 u32 mask;
56 u32 power_on;
57 u32 power_off;
58};
59
60static const struct usb_phy_data omap5_usb2_data = {
61 .label = "omap5_usb2",
62 .flags = 0,
63 .mask = OMAP_DEV_PHY_PD,
64 .power_off = OMAP_DEV_PHY_PD,
65};
66
67static const struct usb_phy_data dra7x_usb2_data = {
68 .label = "dra7x_usb2",
69 .flags = OMAP_USB2_CALIBRATE_FALSE_DISCONNECT,
70 .mask = OMAP_DEV_PHY_PD,
71 .power_off = OMAP_DEV_PHY_PD,
72};
73
74static const struct usb_phy_data dra7x_usb2_phy2_data = {
75 .label = "dra7x_usb2_phy2",
76 .flags = OMAP_USB2_CALIBRATE_FALSE_DISCONNECT,
77 .mask = OMAP_USB2_PHY_PD,
78 .power_off = OMAP_USB2_PHY_PD,
79};
80
Jean-Jacques Hiblot106b08a2018-12-04 11:30:49 +010081static const struct usb_phy_data am437x_usb2_data = {
82 .label = "am437x_usb2",
83 .flags = 0,
84 .mask = AM437X_USB2_PHY_PD | AM437X_USB2_OTG_PD |
85 AM437X_USB2_OTGVDET_EN | AM437X_USB2_OTGSESSEND_EN,
86 .power_on = AM437X_USB2_OTGVDET_EN | AM437X_USB2_OTGSESSEND_EN,
87 .power_off = AM437X_USB2_PHY_PD | AM437X_USB2_OTG_PD,
88};
89
Vignesh Raghavendra77be8b22019-12-09 10:37:31 +053090static const struct usb_phy_data am654_usb2_data = {
91 .label = "am654_usb2",
92 .flags = OMAP_USB2_CALIBRATE_FALSE_DISCONNECT,
93 .mask = AM654_USB2_OTG_PD | AM654_USB2_VBUS_DET_EN |
94 AM654_USB2_VBUSVALID_DET_EN,
95 .power_on = AM654_USB2_VBUS_DET_EN | AM654_USB2_VBUSVALID_DET_EN,
96 .power_off = AM654_USB2_OTG_PD,
97};
98
Jean-Jacques Hiblot45305712018-11-29 10:57:39 +010099static const struct udevice_id omap_usb2_id_table[] = {
100 {
101 .compatible = "ti,omap5-usb2",
102 .data = (ulong)&omap5_usb2_data,
103 },
104 {
105 .compatible = "ti,dra7x-usb2",
106 .data = (ulong)&dra7x_usb2_data,
107 },
108 {
109 .compatible = "ti,dra7x-usb2-phy2",
110 .data = (ulong)&dra7x_usb2_phy2_data,
111 },
Jean-Jacques Hiblot106b08a2018-12-04 11:30:49 +0100112 {
113 .compatible = "ti,am437x-usb2",
114 .data = (ulong)&am437x_usb2_data,
115 },
Vignesh Raghavendra77be8b22019-12-09 10:37:31 +0530116 {
117 .compatible = "ti,am654-usb2",
118 .data = (ulong)&am654_usb2_data,
119 },
Jean-Jacques Hiblot45305712018-11-29 10:57:39 +0100120 {},
121};
122
123static int omap_usb_phy_power(struct phy *usb_phy, bool on)
124{
125 struct udevice *dev = usb_phy->dev;
126 const struct usb_phy_data *data;
127 const struct omap_usb2_phy *phy = dev_get_priv(dev);
128 u32 val;
129 int rc;
130
131 data = (const struct usb_phy_data *)dev_get_driver_data(dev);
132 if (!data)
133 return -EINVAL;
134
135 rc = regmap_read(phy->pwr_regmap, phy->pwr_reg_offset, &val);
136 if (rc)
137 return rc;
138 val &= ~data->mask;
139 if (on)
140 val |= data->power_on;
141 else
142 val |= data->power_off;
143 rc = regmap_write(phy->pwr_regmap, phy->pwr_reg_offset, val);
144 if (rc)
145 return rc;
146
147 return 0;
148}
149
150static int omap_usb2_phy_init(struct phy *usb_phy)
151{
152 struct udevice *dev = usb_phy->dev;
153 struct omap_usb2_phy *priv = dev_get_priv(dev);
154 u32 val;
155
156 if (priv->flags & OMAP_USB2_CALIBRATE_FALSE_DISCONNECT) {
157 /*
158 *
159 * Reduce the sensitivity of internal PHY by enabling the
160 * DISCON_BYP_LATCH of the USB2PHY_ANA_CONFIG1 register. This
161 * resolves issues with certain devices which can otherwise
162 * be prone to false disconnects.
163 *
164 */
165 val = readl(priv->phy_base + USB2PHY_ANA_CONFIG1);
166 val |= USB2PHY_DISCON_BYP_LATCH;
167 writel(val, priv->phy_base + USB2PHY_ANA_CONFIG1);
168 }
169
Bin Liu5b9f3412020-06-03 14:46:22 +0300170 if (priv->flags & OMAP_USB2_DISABLE_CHG_DET) {
171 val = readl(priv->phy_base + USB2PHY_CHRG_DET);
172 val |= USB2PHY_USE_CHG_DET_REG | USB2PHY_DIS_CHG_DET;
173 writel(val, priv->phy_base + USB2PHY_CHRG_DET);
174 }
175
Jean-Jacques Hiblot45305712018-11-29 10:57:39 +0100176 return 0;
177}
178
179static int omap_usb2_phy_power_on(struct phy *usb_phy)
180{
181 return omap_usb_phy_power(usb_phy, true);
182}
183
184static int omap_usb2_phy_power_off(struct phy *usb_phy)
185{
186 return omap_usb_phy_power(usb_phy, false);
187}
188
189static int omap_usb2_phy_exit(struct phy *usb_phy)
190{
191 return omap_usb_phy_power(usb_phy, false);
192}
193
194struct phy_ops omap_usb2_phy_ops = {
195 .init = omap_usb2_phy_init,
196 .power_on = omap_usb2_phy_power_on,
197 .power_off = omap_usb2_phy_power_off,
198 .exit = omap_usb2_phy_exit,
199};
200
Vignesh Raghavendra55c5ff52020-10-08 14:58:38 +0530201static const struct soc_attr am65x_sr10_soc_devices[] = {
202 { .family = "AM65X", .revision = "SR1.0" },
203 { /* sentinel */ }
204};
205
Jean-Jacques Hiblot45305712018-11-29 10:57:39 +0100206int omap_usb2_phy_probe(struct udevice *dev)
207{
208 int rc;
209 struct regmap *regmap;
210 struct omap_usb2_phy *priv = dev_get_priv(dev);
211 const struct usb_phy_data *data;
212 u32 tmp[2];
213
214 data = (const struct usb_phy_data *)dev_get_driver_data(dev);
215 if (!data)
216 return -EINVAL;
217
Bin Liu5b9f3412020-06-03 14:46:22 +0300218 priv->phy_base = dev_read_addr_ptr(dev);
Jean-Jacques Hiblot45305712018-11-29 10:57:39 +0100219
Bin Liu5b9f3412020-06-03 14:46:22 +0300220 if (!priv->phy_base)
221 return -EINVAL;
222
223 if (data->flags & OMAP_USB2_CALIBRATE_FALSE_DISCONNECT)
Jean-Jacques Hiblot45305712018-11-29 10:57:39 +0100224 priv->flags |= OMAP_USB2_CALIBRATE_FALSE_DISCONNECT;
Bin Liu5b9f3412020-06-03 14:46:22 +0300225
226 /*
227 * AM654x PG1.0 has a silicon bug that D+ is pulled high after
228 * POR, which could cause enumeration failure with some USB hubs.
229 * Disabling the USB2_PHY Charger Detect function will put D+
230 * into the normal state.
231 *
Vignesh Raghavendra55c5ff52020-10-08 14:58:38 +0530232 * Enable this workaround for AM654x PG1.0.
Bin Liu5b9f3412020-06-03 14:46:22 +0300233 */
Vignesh Raghavendra55c5ff52020-10-08 14:58:38 +0530234 if (soc_device_match(am65x_sr10_soc_devices))
Bin Liu5b9f3412020-06-03 14:46:22 +0300235 priv->flags |= OMAP_USB2_DISABLE_CHG_DET;
Jean-Jacques Hiblot45305712018-11-29 10:57:39 +0100236
237 regmap = syscon_regmap_lookup_by_phandle(dev, "syscon-phy-power");
Jean-Jacques Hiblot106b08a2018-12-04 11:30:49 +0100238 if (!IS_ERR(regmap)) {
239 priv->pwr_regmap = regmap;
240 rc = dev_read_u32_array(dev, "syscon-phy-power", tmp, 2);
241 if (rc) {
242 printf("couldn't get power reg. offset (err %d)\n", rc);
243 return rc;
244 }
245 priv->pwr_reg_offset = tmp[1];
246 return 0;
Jean-Jacques Hiblot45305712018-11-29 10:57:39 +0100247 }
Jean-Jacques Hiblot106b08a2018-12-04 11:30:49 +0100248 regmap = syscon_regmap_lookup_by_phandle(dev, "ctrl-module");
249 if (!IS_ERR(regmap)) {
250 priv->pwr_regmap = regmap;
251 priv->pwr_reg_offset = 0;
252 return 0;
Jean-Jacques Hiblot45305712018-11-29 10:57:39 +0100253 }
Jean-Jacques Hiblot45305712018-11-29 10:57:39 +0100254
Jean-Jacques Hiblot106b08a2018-12-04 11:30:49 +0100255 printf("can't get regmap (err %ld)\n", PTR_ERR(regmap));
256 return PTR_ERR(regmap);
Jean-Jacques Hiblot45305712018-11-29 10:57:39 +0100257}
258
259U_BOOT_DRIVER(omap_usb2_phy) = {
260 .name = "omap_usb2_phy",
261 .id = UCLASS_PHY,
262 .of_match = omap_usb2_id_table,
263 .probe = omap_usb2_phy_probe,
264 .ops = &omap_usb2_phy_ops,
Simon Glass8a2b47f2020-12-03 16:55:17 -0700265 .priv_auto = sizeof(struct omap_usb2_phy),
Jean-Jacques Hiblot45305712018-11-29 10:57:39 +0100266};