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Ye Licd5bb772020-05-03 22:41:14 +08001// SPDX-License-Identifier: GPL-2.0+
2/*
3 * Copyright 2020 NXP
4 */
5
Patrick Delaunayb26ef6f2021-07-20 20:15:28 +02006#define LOG_CATEGORY UCLASS_ETH_PHY
7
Ye Licd5bb772020-05-03 22:41:14 +08008#include <common.h>
9#include <dm.h>
Patrick Delaunay8c937fa2021-07-20 20:09:52 +020010#include <log.h>
Ye Licd5bb772020-05-03 22:41:14 +080011#include <net.h>
Patrick Delaunaycc2ffab2021-07-20 20:09:51 +020012#include <asm-generic/gpio.h>
Patrick Delaunay8c937fa2021-07-20 20:09:52 +020013#include <dm/device_compat.h>
Ye Licd5bb772020-05-03 22:41:14 +080014#include <dm/device-internal.h>
15#include <dm/uclass-internal.h>
16#include <dm/lists.h>
Patrick Delaunaycc2ffab2021-07-20 20:09:51 +020017#include <linux/delay.h>
Ye Licd5bb772020-05-03 22:41:14 +080018
19struct eth_phy_device_priv {
20 struct mii_dev *mdio_bus;
Patrick Delaunaycc2ffab2021-07-20 20:09:51 +020021 struct gpio_desc reset_gpio;
22 u32 reset_assert_delay;
23 u32 reset_deassert_delay;
Ye Licd5bb772020-05-03 22:41:14 +080024};
25
26int eth_phy_binds_nodes(struct udevice *eth_dev)
27{
28 ofnode mdio_node, phy_node;
29 const char *node_name;
30 int ret;
31
Patrick Delaunaye4231ca2021-07-20 20:09:53 +020032 /* search a subnode named "mdio.*" */
33 dev_for_each_subnode(mdio_node, eth_dev) {
34 node_name = ofnode_get_name(mdio_node);
35 if (!strncmp(node_name, "mdio", 4))
36 break;
37 }
Ye Licd5bb772020-05-03 22:41:14 +080038 if (!ofnode_valid(mdio_node)) {
Patrick Delaunaye4231ca2021-07-20 20:09:53 +020039 dev_dbg(eth_dev, "%s: %s mdio subnode not found!\n", __func__,
Patrick Delaunay8c937fa2021-07-20 20:09:52 +020040 eth_dev->name);
Ye Licd5bb772020-05-03 22:41:14 +080041 return -ENXIO;
42 }
Patrick Delaunaye4231ca2021-07-20 20:09:53 +020043 dev_dbg(eth_dev, "%s: %s subnode found!\n", __func__, node_name);
Ye Licd5bb772020-05-03 22:41:14 +080044
45 ofnode_for_each_subnode(phy_node, mdio_node) {
46 node_name = ofnode_get_name(phy_node);
47
Patrick Delaunay8c937fa2021-07-20 20:09:52 +020048 dev_dbg(eth_dev, "* Found child node: '%s'\n", node_name);
Ye Licd5bb772020-05-03 22:41:14 +080049
50 ret = device_bind_driver_to_node(eth_dev,
51 "eth_phy_generic_drv",
52 node_name, phy_node, NULL);
53 if (ret) {
Patrick Delaunay8c937fa2021-07-20 20:09:52 +020054 dev_dbg(eth_dev, " - Eth phy binding error: %d\n", ret);
Ye Licd5bb772020-05-03 22:41:14 +080055 continue;
56 }
57
Patrick Delaunay8c937fa2021-07-20 20:09:52 +020058 dev_dbg(eth_dev, " - bound phy device: '%s'\n", node_name);
Ye Licd5bb772020-05-03 22:41:14 +080059 }
60
61 return 0;
62}
63
64int eth_phy_set_mdio_bus(struct udevice *eth_dev, struct mii_dev *mdio_bus)
65{
66 struct udevice *dev;
67 struct eth_phy_device_priv *uc_priv;
68
69 for (uclass_first_device(UCLASS_ETH_PHY, &dev); dev;
70 uclass_next_device(&dev)) {
71 if (dev->parent == eth_dev) {
Simon Glass95588622020-12-22 19:30:28 -070072 uc_priv = (struct eth_phy_device_priv *)(dev_get_uclass_priv(dev));
Ye Licd5bb772020-05-03 22:41:14 +080073
74 if (!uc_priv->mdio_bus)
75 uc_priv->mdio_bus = mdio_bus;
76 }
77 }
78
79 return 0;
80}
81
82struct mii_dev *eth_phy_get_mdio_bus(struct udevice *eth_dev)
83{
84 int ret;
85 struct udevice *phy_dev;
86 struct eth_phy_device_priv *uc_priv;
87
88 /* Will probe the parent of phy device, then phy device */
89 ret = uclass_get_device_by_phandle(UCLASS_ETH_PHY, eth_dev,
90 "phy-handle", &phy_dev);
91 if (!ret) {
92 if (eth_dev != phy_dev->parent) {
93 /*
94 * phy_dev is shared and controlled by
95 * other eth controller
96 */
Simon Glass95588622020-12-22 19:30:28 -070097 uc_priv = (struct eth_phy_device_priv *)(dev_get_uclass_priv(phy_dev));
Ye Licd5bb772020-05-03 22:41:14 +080098 if (uc_priv->mdio_bus)
Patrick Delaunay8c937fa2021-07-20 20:09:52 +020099 log_notice("Get shared mii bus on %s\n", eth_dev->name);
Ye Licd5bb772020-05-03 22:41:14 +0800100 else
Patrick Delaunay8c937fa2021-07-20 20:09:52 +0200101 log_notice("Can't get shared mii bus on %s\n", eth_dev->name);
Ye Licd5bb772020-05-03 22:41:14 +0800102
103 return uc_priv->mdio_bus;
104 }
105 } else {
Marek Vasutdfd03c12022-01-01 20:12:23 +0100106 log_debug("Can't find phy-handle for %s\n", eth_dev->name);
Ye Licd5bb772020-05-03 22:41:14 +0800107 }
108
109 return NULL;
110}
111
112int eth_phy_get_addr(struct udevice *dev)
113{
114 struct ofnode_phandle_args phandle_args;
115 int reg;
116
117 if (dev_read_phandle_with_args(dev, "phy-handle", NULL, 0, 0,
118 &phandle_args)) {
Patrick Delaunay8c937fa2021-07-20 20:09:52 +0200119 dev_dbg(dev, "Failed to find phy-handle");
Ye Licd5bb772020-05-03 22:41:14 +0800120 return -ENODEV;
121 }
122
123 reg = ofnode_read_u32_default(phandle_args.node, "reg", 0);
124
125 return reg;
126}
127
Patrick Delaunaycc2ffab2021-07-20 20:09:51 +0200128/* parsing generic properties of devicetree/bindings/net/ethernet-phy.yaml */
129static int eth_phy_of_to_plat(struct udevice *dev)
130{
131 struct eth_phy_device_priv *uc_priv = dev_get_uclass_priv(dev);
132 int ret;
133
134 if (!CONFIG_IS_ENABLED(DM_GPIO))
135 return 0;
136
137 /* search "reset-gpios" in phy node */
138 ret = gpio_request_by_name(dev, "reset-gpios", 0,
139 &uc_priv->reset_gpio,
Tim Harvey2db9dae2022-03-01 12:15:02 -0800140 GPIOD_IS_OUT | GPIOD_IS_OUT_ACTIVE);
Marek Vasut9da5a552021-11-13 03:23:11 +0100141 if (ret && ret != -ENOENT)
Patrick Delaunaycc2ffab2021-07-20 20:09:51 +0200142 return ret;
143
144 uc_priv->reset_assert_delay = dev_read_u32_default(dev, "reset-assert-us", 0);
145 uc_priv->reset_deassert_delay = dev_read_u32_default(dev, "reset-deassert-us", 0);
146
Marek Vasut61dd9c12023-05-31 00:51:27 +0200147 /* These are used by some DTs, try these as a fallback. */
148 if (!uc_priv->reset_assert_delay && !uc_priv->reset_deassert_delay) {
149 uc_priv->reset_assert_delay =
150 dev_read_u32_default(dev, "reset-delay-us", 0);
151 uc_priv->reset_deassert_delay =
152 dev_read_u32_default(dev, "reset-post-delay-us", 0);
153 }
154
Patrick Delaunaycc2ffab2021-07-20 20:09:51 +0200155 return 0;
156}
157
Marek Vasut7b7cbd52023-05-31 00:51:18 +0200158static void eth_phy_reset(struct udevice *dev, int value)
Patrick Delaunaycc2ffab2021-07-20 20:09:51 +0200159{
160 struct eth_phy_device_priv *uc_priv = dev_get_uclass_priv(dev);
161 u32 delay;
162
163 if (!CONFIG_IS_ENABLED(DM_GPIO))
164 return;
165
166 if (!dm_gpio_is_valid(&uc_priv->reset_gpio))
167 return;
168
169 dm_gpio_set_value(&uc_priv->reset_gpio, value);
170
171 delay = value ? uc_priv->reset_assert_delay : uc_priv->reset_deassert_delay;
172 if (delay)
173 udelay(delay);
174}
175
176static int eth_phy_pre_probe(struct udevice *dev)
177{
178 /* Assert and deassert the reset signal */
179 eth_phy_reset(dev, 1);
180 eth_phy_reset(dev, 0);
181
182 return 0;
183}
184
Ye Licd5bb772020-05-03 22:41:14 +0800185UCLASS_DRIVER(eth_phy_generic) = {
186 .id = UCLASS_ETH_PHY,
187 .name = "eth_phy_generic",
Simon Glass8a2b47f2020-12-03 16:55:17 -0700188 .per_device_auto = sizeof(struct eth_phy_device_priv),
Patrick Delaunaycc2ffab2021-07-20 20:09:51 +0200189 .pre_probe = eth_phy_pre_probe,
Ye Licd5bb772020-05-03 22:41:14 +0800190};
191
192U_BOOT_DRIVER(eth_phy_generic_drv) = {
193 .name = "eth_phy_generic_drv",
194 .id = UCLASS_ETH_PHY,
Patrick Delaunaycc2ffab2021-07-20 20:09:51 +0200195 .of_to_plat = eth_phy_of_to_plat,
Ye Licd5bb772020-05-03 22:41:14 +0800196};