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Tom Rini10e47792018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Michal Simek04b7e622015-01-15 10:01:51 +01002/*
3 * (C) Copyright 2014 - 2015 Xilinx, Inc.
4 * Michal Simek <michal.simek@xilinx.com>
Michal Simek04b7e622015-01-15 10:01:51 +01005 */
6
7#include <common.h>
Simon Glass97589732020-05-10 11:40:02 -06008#include <init.h>
Simon Glassa9dc0682019-12-28 10:44:59 -07009#include <time.h>
Michal Simek0ca55572015-04-15 14:59:19 +020010#include <asm/arch/clk.h>
Michal Simek04b7e622015-01-15 10:01:51 +010011#include <asm/arch/hardware.h>
12#include <asm/arch/sys_proto.h>
13
14DECLARE_GLOBAL_DATA_PTR;
15
Michal Simekc23d3f82015-11-05 08:34:35 +010016unsigned long zynqmp_get_system_timer_freq(void)
17{
18 u32 ver = zynqmp_get_silicon_version();
19
20 switch (ver) {
Michal Simekc23d3f82015-11-05 08:34:35 +010021 case ZYNQMP_CSU_VERSION_QEMU:
22 return 50000000;
23 }
24
25 return 100000000;
26}
27
Michal Simek04b7e622015-01-15 10:01:51 +010028#ifdef CONFIG_CLOCKS
29/**
30 * set_cpu_clk_info() - Initialize clock framework
31 * Always returns zero.
32 *
33 * This function is called from common code after relocation and sets up the
34 * clock framework. The framework must not be used before this function had been
35 * called.
36 */
37int set_cpu_clk_info(void)
38{
39 gd->cpu_clk = get_tbclk();
40
Michal Simekdaf315f2018-05-14 15:33:22 +020041 gd->bd->bi_arm_freq = gd->cpu_clk / 1000000;
Michal Simek04b7e622015-01-15 10:01:51 +010042
43 gd->bd->bi_dsp_freq = 0;
44
45 return 0;
46}
47#endif